boards: 96b_carbon: Add support for 96boards Carbon board

Add support for the STM32F401 chip on the board

Change-Id: I96c0799f3658ecea096fa5971bce9faf21919ee1
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>

MAINTAINERS

@@ -95,6 +95,12 @@ M:      Anas Nashif <anas.nashif@intel.com>
 S:	Supported
 F:	boards/arc/quark_se_c1000_ss_devboard/
 
+BOARDS/ARM - 96Boards CARBON
+M:	Amit Kucheria <amit.kucheria@linaro.org>
+M:	Ricardo Salveti <ricardo.salveti@linaro.org>
+S:	Supported
+F:	boards/arm/96b_carbon/
+
 BOARDS/ARM - 96Boards NITROGEN
 M:	Amit Kucheria <amit.kucheria@linaro.org>
 S:	Supported

arch/arm/soc/st_stm32/stm32f4/soc_pinmux.c

@@ -22,6 +22,16 @@
 #include <pinmux/stm32/pinmux_stm32.h>
 #include <drivers/clock_control/stm32_clock_control.h>
 
+static const stm32_pin_func_t pin_pa9_funcs[] = {
+	[STM32F4_PINMUX_FUNC_PA9_USART1_TX - 1] =
+			STM32F4X_PIN_CONFIG_AF_PUSH_UP,
+};
+
+static const stm32_pin_func_t pin_pa10_funcs[] = {
+	[STM32F4_PINMUX_FUNC_PA10_USART1_RX - 1] =
+			STM32F4X_PIN_CONFIG_AF_PUSH_UP,
+};
+
 static const stm32_pin_func_t pin_pb6_funcs[] = {
 	[STM32F4_PINMUX_FUNC_PB6_USART1_TX - 1] =
 			STM32F4X_PIN_CONFIG_AF_PUSH_UP,
@@ -46,6 +56,8 @@ static const stm32_pin_func_t pin_pa3_funcs[] = {
  * @brief pin configuration
  */
 static const struct stm32_pinmux_conf pins[] = {
+	STM32_PIN_CONF(STM32_PIN_PA9, pin_pa9_funcs),
+	STM32_PIN_CONF(STM32_PIN_PA10, pin_pa10_funcs),
 	STM32_PIN_CONF(STM32_PIN_PB6, pin_pb6_funcs),
 	STM32_PIN_CONF(STM32_PIN_PB7, pin_pb7_funcs),
 	STM32_PIN_CONF(STM32_PIN_PA2, pin_pa2_funcs),

boards/arm/96b_carbon/96b_carbon_defconfig

@@ -0,0 +1,47 @@
+CONFIG_ARM=y
+CONFIG_BOARD_96B_CARBON=y
+CONFIG_SOC_FAMILY_STM32=y
+CONFIG_SOC_SERIES_STM32F4X=y
+CONFIG_SOC_STM32F401RE=y
+# 84MHz system clock
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
+
+# enable uart driver
+CONFIG_SERIAL=y
+CONFIG_UART_STM32=y
+# enable USART1 - passthrough to FT230XQ
+CONFIG_UART_STM32_PORT_0=y
+CONFIG_UART_STM32_PORT_0_BAUD_RATE=115200
+# enable console on this port by default
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_0"
+
+# enable pinmux
+CONFIG_PINMUX=y
+CONFIG_PINMUX_STM32=y
+
+# enable GPIO ports A, B, C, D
+CONFIG_GPIO=y
+CONFIG_GPIO_STM32=y
+CONFIG_GPIO_STM32_PORTA=y
+CONFIG_GPIO_STM32_PORTB=y
+CONFIG_GPIO_STM32_PORTC=y
+CONFIG_GPIO_STM32_PORTD=y
+
+# clock configuration
+CONFIG_CLOCK_CONTROL=y
+CONFIG_CLOCK_CONTROL_STM32F4X=y
+CONFIG_CLOCK_STM32F4X_SYSCLK_SRC_PLL=y
+# use HSE as PLL input
+CONFIG_CLOCK_STM32F4X_PLL_SRC_HSE=y
+# CONFIG_CLOCK_STM32F4X_HSE_BYPASS=y
+# produce 84MHz clock at PLL output
+CONFIG_CLOCK_STM32F4X_PLLM_DIV_FACTOR=8
+CONFIG_CLOCK_STM32F4X_PLLN_MULTIPLIER=336
+CONFIG_CLOCK_STM32F4X_PLLP_DIV_FACTOR=8
+CONFIG_CLOCK_STM32F4X_PLLQ_DIV_FACTOR=7
+CONFIG_CLOCK_STM32F4X_AHB_PRESCALER=0
+CONFIG_CLOCK_STM32F4X_APB1_PRESCALER=2
+CONFIG_CLOCK_STM32F4X_APB2_PRESCALER=0

boards/arm/96b_carbon/Kconfig.board

@@ -0,0 +1,20 @@
+# Kconfig - 96boards Carbon STMF401RE board configuration
+#
+# Copyright (c) 2016 Linaro Limited.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+config BOARD_96B_CARBON
+	bool "96Boards Carbon (STM32F401)"
+	depends on SOC_STM32F401RE

boards/arm/96b_carbon/Kconfig.defconfig

@@ -0,0 +1,23 @@
+# Kconfig - 96boards Carbon board configuration
+#
+# Copyright (c) 2016 Linaro Limited.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+if BOARD_96B_CARBON
+
+config BOARD
+	default 96b_carbon
+
+endif # BOARD_96B_CARBON

boards/arm/96b_carbon/Makefile

@@ -0,0 +1 @@
+obj- += dummy.o

boards/arm/96b_carbon/board.h

@@ -0,0 +1,22 @@
+/*
+ * Copyright (c) 2016 Linaro Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __INC_BOARD_H
+#define __INC_BOARD_H
+
+#include <soc.h>
+
+#endif /* __INC_BOARD_H */

drivers/pinmux/Makefile

@@ -7,6 +7,7 @@ obj-$(CONFIG_BOARD_HEXIWEAR_K64) += k64/pinmux_board_hexiwear.o
 obj-$(CONFIG_PINMUX_STM32) += stm32/pinmux_stm32.o
 obj-$(CONFIG_BOARD_NUCLEO_F103RB) += stm32/pinmux_board_nucleo_f103rb.o
 obj-$(CONFIG_BOARD_NUCLEO_F401RE) += stm32/pinmux_board_nucleo_f401re.o
+obj-$(CONFIG_BOARD_96B_CARBON) += stm32/pinmux_board_carbon.o
 obj-$(CONFIG_BOARD_OLIMEXINO_STM32) += stm32/pinmux_board_olimexino_stm32.o
 obj-$(CONFIG_BOARD_STM32_MINI_A15) += stm32/pinmux_board_stm32_mini_a15.o
 

drivers/pinmux/stm32/pinmux_board_carbon.c

@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2016 Linaro Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <nanokernel.h>
+#include <device.h>
+#include <init.h>
+#include <pinmux.h>
+#include <sys_io.h>
+#include "pinmux/pinmux.h"
+
+#include "pinmux_stm32.h"
+
+/* pin assignments for 96boards Carbon board */
+static const struct pin_config pinconf[] = {
+#ifdef CONFIG_UART_STM32_PORT_0
+	{STM32_PIN_PA9, STM32F4_PINMUX_FUNC_PA9_USART1_TX},
+	{STM32_PIN_PA10, STM32F4_PINMUX_FUNC_PA10_USART1_RX},
+#endif	/* CONFIG_UART_STM32_PORT_0 */
+#ifdef CONFIG_UART_STM32_PORT_1
+	{STM32_PIN_PA2, STM32F4_PINMUX_FUNC_PA2_USART2_TX},
+	{STM32_PIN_PA3, STM32F4_PINMUX_FUNC_PA3_USART2_RX},
+#endif	/* CONFIG_UART_STM32_PORT_1 */
+};
+
+static int pinmux_stm32_init(struct device *port)
+{
+	ARG_UNUSED(port);
+
+	stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
+
+	return 0;
+}
+
+SYS_INIT(pinmux_stm32_init, PRIMARY,
+		CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);

drivers/pinmux/stm32/pinmux_stm32f4.h

@@ -21,6 +21,9 @@
  * @file Header for STM32F4 pin multiplexing helper
  */
 
+#define STM32F4_PINMUX_FUNC_PA9_USART1_TX STM32_PINMUX_FUNC_ALT_7
+#define STM32F4_PINMUX_FUNC_PA10_USART1_RX STM32_PINMUX_FUNC_ALT_7
+
 #define STM32F4_PINMUX_FUNC_PB6_USART1_TX STM32_PINMUX_FUNC_ALT_7
 #define STM32F4_PINMUX_FUNC_PB7_USART1_RX STM32_PINMUX_FUNC_ALT_7
 

scripts/sanity_chk/arches/arm.ini

@@ -2,7 +2,7 @@
 name = arm
 platforms = qemu_cortex_m3 frdm_k64f arduino_due nucleo_f103rb stm32_mini_a15
             olimexino_stm32 96b_nitrogen nrf52_pca10040 hexiwear_k64
-            nrf51_pca10028 arduino_101_ble nucleo_f401re
+            nrf51_pca10028 arduino_101_ble nucleo_f401re 96b_carbon
 supported_toolchains = zephyr gccarmemb
 
 [qemu_cortex_m3]