drivers: mcux_gpt_timer: Enabled GPT timer on MIMXRT1064 EVK
This enables the GPT timer for use as a hardware clock on the MIMXRT1064. The timer will be disabled when builds use the GPT timer as a counter, and the build will fall back to using the Cortex M systick as a timer. This was tested using the kernel tickless test, to verify the driver functions as expected. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
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5 changed files with 25 additions and 4 deletions
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@ -124,6 +124,8 @@ features:
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+-----------+------------+-------------------------------------+
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+-----------+------------+-------------------------------------+
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| SPI | on-chip | spi |
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| SPI | on-chip | spi |
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+-----------+------------+-------------------------------------+
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+-----------+------------+-------------------------------------+
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| GPT | on-chip | gpt |
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+-----------+------------+-------------------------------------+
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| DMA | on-chip | dma |
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| DMA | on-chip | dma |
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+-----------+------------+-------------------------------------+
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+-----------+------------+-------------------------------------+
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| HWINFO | on-chip | Unique device serial number |
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| HWINFO | on-chip | Unique device serial number |
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@ -277,8 +279,8 @@ The MIMXRT1064 SoC has four pairs of pinmux/gpio controllers.
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System Clock
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System Clock
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============
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============
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The MIMXRT1064 SoC is configured to use the 24 MHz external oscillator on the
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The MIMXRT1064 SoC is configured to use the 32 KHz low frequency oscillator on
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board with the on-chip PLL to generate a 600 MHz core clock.
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the board as a source for the GPT timer to generate a system clock.
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Serial Port
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Serial Port
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===========
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===========
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@ -266,3 +266,10 @@ zephyr_udc0: &usb1 {
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&adc1 {
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&adc1 {
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status = "okay";
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status = "okay";
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};
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};
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/* Enable GPT for use as a hardware timer. This disables Cortex Systick.
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* to use systick, change this node from "gpt_hw_timer" to "systick"
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*/
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&gpt_hw_timer {
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status = "okay";
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};
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@ -9,8 +9,6 @@ CONFIG_SOC_SERIES_IMX_RT=y
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CONFIG_CONSOLE=y
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_SERIAL=y
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CONFIG_SERIAL=y
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_GPIO=y
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CONFIG_GPIO=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=600000000
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CONFIG_ARM_MPU=y
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CONFIG_ARM_MPU=y
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CONFIG_HW_STACK_PROTECTION=y
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CONFIG_HW_STACK_PROTECTION=y
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@ -23,4 +23,7 @@ config IPG_DIV
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config GPIO
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config GPIO
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default y
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default y
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 600000000 if CORTEX_M_SYSTICK
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endif # SOC_MIMXRT1064
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endif # SOC_MIMXRT1064
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@ -198,6 +198,17 @@ config TEST_EXTRA_STACKSIZE
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default 1024
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default 1024
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endif # MBEDTLS
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endif # MBEDTLS
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if MCUX_GPT_TIMER
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# set the tick per sec as a divider of the GPT clock source
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config SYS_CLOCK_TICKS_PER_SEC
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default 8192
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 32786
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endif #MCUX_GPT_TIMER
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source "soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt*"
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source "soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt*"
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endif # SOC_SERIES_IMX_RT
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endif # SOC_SERIES_IMX_RT
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