From e99eb6bb70f0a9fd55092b2eef5702f16ce7a6c5 Mon Sep 17 00:00:00 2001 From: Daniel DeGrasse Date: Thu, 14 Oct 2021 09:24:30 -0500 Subject: [PATCH] drivers: mcux_gpt_timer: Enabled GPT timer on MIMXRT1064 EVK This enables the GPT timer for use as a hardware clock on the MIMXRT1064. The timer will be disabled when builds use the GPT timer as a counter, and the build will fall back to using the Cortex M systick as a timer. This was tested using the kernel tickless test, to verify the driver functions as expected. Signed-off-by: Daniel DeGrasse --- boards/arm/mimxrt1064_evk/doc/index.rst | 6 ++++-- boards/arm/mimxrt1064_evk/mimxrt1064_evk.dts | 7 +++++++ boards/arm/mimxrt1064_evk/mimxrt1064_evk_defconfig | 2 -- soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1064 | 3 +++ soc/arm/nxp_imx/rt/Kconfig.defconfig.series | 11 +++++++++++ 5 files changed, 25 insertions(+), 4 deletions(-) diff --git a/boards/arm/mimxrt1064_evk/doc/index.rst b/boards/arm/mimxrt1064_evk/doc/index.rst index 2785b10370b..0453455630e 100644 --- a/boards/arm/mimxrt1064_evk/doc/index.rst +++ b/boards/arm/mimxrt1064_evk/doc/index.rst @@ -124,6 +124,8 @@ features: +-----------+------------+-------------------------------------+ | SPI | on-chip | spi | +-----------+------------+-------------------------------------+ +| GPT | on-chip | gpt | ++-----------+------------+-------------------------------------+ | DMA | on-chip | dma | +-----------+------------+-------------------------------------+ | HWINFO | on-chip | Unique device serial number | @@ -277,8 +279,8 @@ The MIMXRT1064 SoC has four pairs of pinmux/gpio controllers. System Clock ============ -The MIMXRT1064 SoC is configured to use the 24 MHz external oscillator on the -board with the on-chip PLL to generate a 600 MHz core clock. +The MIMXRT1064 SoC is configured to use the 32 KHz low frequency oscillator on +the board as a source for the GPT timer to generate a system clock. Serial Port =========== diff --git a/boards/arm/mimxrt1064_evk/mimxrt1064_evk.dts b/boards/arm/mimxrt1064_evk/mimxrt1064_evk.dts index ce58cba406a..953833f5de0 100644 --- a/boards/arm/mimxrt1064_evk/mimxrt1064_evk.dts +++ b/boards/arm/mimxrt1064_evk/mimxrt1064_evk.dts @@ -266,3 +266,10 @@ zephyr_udc0: &usb1 { &adc1 { status = "okay"; }; + +/* Enable GPT for use as a hardware timer. This disables Cortex Systick. + * to use systick, change this node from "gpt_hw_timer" to "systick" + */ +&gpt_hw_timer { + status = "okay"; +}; diff --git a/boards/arm/mimxrt1064_evk/mimxrt1064_evk_defconfig b/boards/arm/mimxrt1064_evk/mimxrt1064_evk_defconfig index fa99c094ecd..00110359f68 100644 --- a/boards/arm/mimxrt1064_evk/mimxrt1064_evk_defconfig +++ b/boards/arm/mimxrt1064_evk/mimxrt1064_evk_defconfig @@ -9,8 +9,6 @@ CONFIG_SOC_SERIES_IMX_RT=y CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y CONFIG_SERIAL=y -CONFIG_CORTEX_M_SYSTICK=y CONFIG_GPIO=y -CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=600000000 CONFIG_ARM_MPU=y CONFIG_HW_STACK_PROTECTION=y diff --git a/soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1064 b/soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1064 index 4b0d1b09b99..f991f5b3d03 100644 --- a/soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1064 +++ b/soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1064 @@ -23,4 +23,7 @@ config IPG_DIV config GPIO default y +config SYS_CLOCK_HW_CYCLES_PER_SEC + default 600000000 if CORTEX_M_SYSTICK + endif # SOC_MIMXRT1064 diff --git a/soc/arm/nxp_imx/rt/Kconfig.defconfig.series b/soc/arm/nxp_imx/rt/Kconfig.defconfig.series index b191de14756..749dc9b48f6 100644 --- a/soc/arm/nxp_imx/rt/Kconfig.defconfig.series +++ b/soc/arm/nxp_imx/rt/Kconfig.defconfig.series @@ -198,6 +198,17 @@ config TEST_EXTRA_STACKSIZE default 1024 endif # MBEDTLS +if MCUX_GPT_TIMER + +# set the tick per sec as a divider of the GPT clock source +config SYS_CLOCK_TICKS_PER_SEC + default 8192 + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default 32786 + +endif #MCUX_GPT_TIMER + source "soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt*" endif # SOC_SERIES_IMX_RT