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drivers: clock_control: Provide support for stm32l0x

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Add Clock Control support for the stm32l0x based on reference manuals

Signed-off-by: Endre Karlson <endre.karlson@gmail.com>
This commit is contained in:
Endre Karlson 2018-02-05 07:31:07 +01:00 • committed by Kumar Gala
commit e99a79a9b1
5 changed files with 79 additions and 0 deletions
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1
drivers/clock_control/CMakeLists.txt
View file

@ -11,5 +11,6 @@ if(CONFIG_CLOCK_CONTROL_STM32_CUBE)
zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32F1X stm32f1x_ll_clock.c) zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32F1X stm32f1x_ll_clock.c)
zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32F3X stm32f3x_ll_clock.c) zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32F3X stm32f3x_ll_clock.c)
zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32F4X stm32f4x_ll_clock.c) zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32F4X stm32f4x_ll_clock.c)
zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32L0X stm32l0x_ll_clock.c)
zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32L4X stm32l4x_ll_clock.c) zephyr_sources_ifdef(CONFIG_SOC_SERIES_STM32L4X stm32l4x_ll_clock.c)
endif() endif()

21
drivers/clock_control/Kconfig.stm32
View file

@ -247,6 +247,27 @@ config CLOCK_STM32_PLL_Q_DIVISOR
endif # SOC_SERIES_STM32F4X endif # SOC_SERIES_STM32F4X
if SOC_SERIES_STM32L0X
config CLOCK_STM32_PLL_MULTIPLIER
int "PLL multiplier"
depends on CLOCK_STM32_SYSCLK_SRC_PLL
default 4
range 3 48
help
PLL multiplier, allowed values: 3, 4, 6, 8, 12, 16, 24, 32, 48.
PLL output must not exceed 96MHz(1.8V)/48MHz(1.5V)/24MHz(1.2V).
config CLOCK_STM32_PLL_DIVISOR
int "PLL divisor"
depends on CLOCK_STM32_SYSCLK_SRC_PLL
default 2
range 2 4
help
PLL divisor, allowed values: 2-4.
endif # SOC_SERIES_STM32L0X
if SOC_SERIES_STM32L4X if SOC_SERIES_STM32L4X
config CLOCK_STM32_PLL_M_DIVISOR config CLOCK_STM32_PLL_M_DIVISOR

13
drivers/clock_control/stm32_ll_clock.c
View file

@ -74,6 +74,11 @@ static inline int stm32_clock_control_on(struct device *dev,
LL_APB2_GRP1_EnableClock(pclken->enr); LL_APB2_GRP1_EnableClock(pclken->enr);
break; break;
#endif /* CONFIG_SOC_SERIES_STM32F0X */ #endif /* CONFIG_SOC_SERIES_STM32F0X */
#ifdef CONFIG_SOC_SERIES_STM32L0X
case STM32_CLOCK_BUS_IOP:
LL_IOP_GRP1_EnableClock(pclken->enr);
break;
#endif /* CONFIG_SOC_SERIES_STM32L0X */
} }
return 0; return 0;
@ -109,6 +114,11 @@ static inline int stm32_clock_control_off(struct device *dev,
LL_APB2_GRP1_DisableClock(pclken->enr); LL_APB2_GRP1_DisableClock(pclken->enr);
break; break;
#endif /* CONFIG_SOC_SERIES_STM32F0X */ #endif /* CONFIG_SOC_SERIES_STM32F0X */
#ifdef CONFIG_SOC_SERIES_STM32L0X
case STM32_CLOCK_BUS_IOP:
LL_IOP_GRP1_DisableClock(pclken->enr);
break;
#endif /* CONFIG_SOC_SERIES_STM32L0X */
} }
return 0; return 0;
@ -139,6 +149,9 @@ static int stm32_clock_control_get_subsys_rate(struct device *clock,
switch (pclken->bus) { switch (pclken->bus) {
case STM32_CLOCK_BUS_AHB1: case STM32_CLOCK_BUS_AHB1:
case STM32_CLOCK_BUS_AHB2: case STM32_CLOCK_BUS_AHB2:
#ifdef CONFIG_SOC_SERIES_STM32L0X
case STM32_CLOCK_BUS_IOP:
#endif /* CONFIG_SOC_SERIES_STM32L0X */
*rate = ahb_clock; *rate = ahb_clock;
break; break;
case STM32_CLOCK_BUS_APB1: case STM32_CLOCK_BUS_APB1:

43
drivers/clock_control/stm32l0x_ll_clock.c Normal file
View file

@ -0,0 +1,43 @@
/*
*
* Copyright (c) 2018 Ilya Tagunov
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <soc.h>
#include <soc_registers.h>
#include <clock_control.h>
#include <misc/util.h>
#include <clock_control/stm32_clock_control.h>
#include "stm32_ll_clock.h"
#ifdef CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL
/* Macros to fill up multiplication and division factors values */
#define _pll_mul(v) LL_RCC_PLL_MUL_ ## v
#define pll_mul(v) _pll_mul(v)
#define _pll_div(v) LL_RCC_PLL_DIV_ ## v
#define pll_div(v) _pll_div(v)
/**
* @brief Fill PLL configuration structure
*/
void config_pll_init(LL_UTILS_PLLInitTypeDef *pllinit)
{
pllinit->PLLMul = pll_mul(CONFIG_CLOCK_STM32_PLL_MULTIPLIER);
pllinit->PLLDiv = pll_div(CONFIG_CLOCK_STM32_PLL_DIVISOR);
}
#endif /* CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL */
/**
* @brief Activate default clocks
*/
void config_enable_default_clocks(void)
{
/* Nothing for now */
}

1
include/dt-bindings/clock/stm32_clock.h
View file

@ -12,6 +12,7 @@
#define STM32_CLOCK_BUS_APB1 2 #define STM32_CLOCK_BUS_APB1 2
#define STM32_CLOCK_BUS_APB2 3 #define STM32_CLOCK_BUS_APB2 3
#define STM32_CLOCK_BUS_APB1_2 4 #define STM32_CLOCK_BUS_APB1_2 4
#define STM32_CLOCK_BUS_IOP 5
#endif /* __STM32_CLOCK_H */ #endif /* __STM32_CLOCK_H */