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arch/xtensa: smp: only zero BSS only when boot from CPU #0

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Under SMP, the main BSS section only needs to be zero-ed on CPU #0.
Other CPUs should not zero out BSS, or else it may cause CPU #0 to
crash on invalid data.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
Daniel Leung 2019-02-21 15:05:28 -08:00 • committed by Anas Nashif
commit e8d2c92abb
1 changed files with 8 additions and 0 deletions
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8
arch/xtensa/core/crt1.S
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@ -136,6 +136,14 @@ _start:
/* Clear a0 again as possible CALLX to __memmap_init changed it. */
movi a0, 0
# endif
# ifdef CONFIG_SMP
/* Only clear BSS when running on core 0 */
rsr a3, PRID
extui a3, a3, 0, 8 /* extract core ID */
bnez a3, .L3zte
# endif
/*
* Clear the BSS (uninitialized data) segments.
* This code supports multiple zeroed sections (*.bss).