From e6a31a9e89169c898ce6e3ca4927ceaab9fef3b3 Mon Sep 17 00:00:00 2001
From: "Charles E. Youse" <charles.youse@intel.com>
Date: Mon, 7 Oct 2019 13:35:56 -0400
Subject: [PATCH] arch/x86: (Intel64) initialize TSS interrupt stack from
 cpuboot[]

In non-SMP MP situations, the interrupt stacks might not exist, so
do not assume they do. Instead, initialize the TSS IST1 from the
cpuboot[] vector (meaning, on APs, the stack from z_arch_start_cpu).
Eliminates redundancy at the same time.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
---
 arch/x86/core/intel64/cpu.c    | 4 ----
 arch/x86/core/intel64/locore.S | 1 +
 2 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/arch/x86/core/intel64/cpu.c b/arch/x86/core/intel64/cpu.c
index d078ff8a515..2e15f85cb19 100644
--- a/arch/x86/core/intel64/cpu.c
+++ b/arch/x86/core/intel64/cpu.c
@@ -27,7 +27,6 @@ extern u8_t _exception_stack3[];
 
 Z_GENERIC_SECTION(.tss)
 struct x86_tss64 tss0 = {
-	.ist1 = (u64_t) _interrupt_stack + CONFIG_ISR_STACK_SIZE,
 	.ist7 = (u64_t) _exception_stack + CONFIG_EXCEPTION_STACK_SIZE,
 	.iomapb = 0xFFFF,
 	.cpu = &(_kernel.cpus[0])
@@ -36,7 +35,6 @@ struct x86_tss64 tss0 = {
 #if defined(CONFIG_SMP) && (CONFIG_MP_NUM_CPUS > 1)
 Z_GENERIC_SECTION(.tss)
 struct x86_tss64 tss1 = {
-	.ist1 = (u64_t) _interrupt_stack1 + CONFIG_ISR_STACK_SIZE,
 	.ist7 = (u64_t) _exception_stack1 + CONFIG_EXCEPTION_STACK_SIZE,
 	.iomapb = 0xFFFF,
 	.cpu = &(_kernel.cpus[1])
@@ -46,7 +44,6 @@ struct x86_tss64 tss1 = {
 #if defined(CONFIG_SMP) && (CONFIG_MP_NUM_CPUS > 2)
 Z_GENERIC_SECTION(.tss)
 struct x86_tss64 tss2 = {
-	.ist1 = (u64_t) _interrupt_stack2 + CONFIG_ISR_STACK_SIZE,
 	.ist7 = (u64_t) _exception_stack2 + CONFIG_EXCEPTION_STACK_SIZE,
 	.iomapb = 0xFFFF,
 	.cpu = &(_kernel.cpus[2])
@@ -56,7 +53,6 @@ struct x86_tss64 tss2 = {
 #if defined(CONFIG_SMP) && (CONFIG_MP_NUM_CPUS > 3)
 Z_GENERIC_SECTION(.tss)
 struct x86_tss64 tss3 = {
-	.ist1 = (u64_t) _interrupt_stack3 + CONFIG_ISR_STACK_SIZE,
 	.ist7 = (u64_t) _exception_stack3 + CONFIG_EXCEPTION_STACK_SIZE,
 	.iomapb = 0xFFFF,
 	.cpu = &(_kernel.cpus[3])
diff --git a/arch/x86/core/intel64/locore.S b/arch/x86/core/intel64/locore.S
index 8fb9f9a214d..6fc7f1e7f40 100644
--- a/arch/x86/core/intel64/locore.S
+++ b/arch/x86/core/intel64/locore.S
@@ -135,6 +135,7 @@ go64:	movl %cr4, %eax			/* enable PAE and SSE */
 	movw %ax, %gs
 
 	movq __x86_cpuboot_t_sp_OFFSET(%rbp), %rsp
+	movq %rsp, %gs:__x86_tss64_t_ist1_OFFSET
 
 	/*
 	 * finally, complete environment for the C runtime and go.