diff --git a/soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8ml8_a53 b/soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8ml8_a53 index 25aecdaf1f2..6e782299635 100644 --- a/soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8ml8_a53 +++ b/soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8ml8_a53 @@ -1,4 +1,4 @@ -# Copyright 2021-2023 NXP +# Copyright 2021-2023, 2025 NXP # SPDX-License-Identifier: Apache-2.0 if SOC_MIMX8ML8_A53 @@ -16,6 +16,12 @@ config FLASH_BASE_ADDRESS config GIC_SAFE_CONFIG default y +# Disable data cache until MMU is enabled when booting from EL2 +config ARM64_DCACHE_ALL_OPS + default y +config ARM64_BOOT_DISABLE_DCACHE + default y + config NUM_IRQS default 240 diff --git a/soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8mm6_a53 b/soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8mm6_a53 index a3e0a8ec7ff..9850d025ffa 100644 --- a/soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8mm6_a53 +++ b/soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8mm6_a53 @@ -1,4 +1,4 @@ -# Copyright 2020-2024 NXP +# Copyright 2020-2025 NXP # SPDX-License-Identifier: Apache-2.0 if SOC_MIMX8MM6_A53 @@ -16,6 +16,12 @@ config FLASH_BASE_ADDRESS config GIC_SAFE_CONFIG default y +# Disable data cache until MMU is enabled when booting from EL2 +config ARM64_DCACHE_ALL_OPS + default y +config ARM64_BOOT_DISABLE_DCACHE + default y + config NUM_IRQS default 240 diff --git a/soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8mn6_a53 b/soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8mn6_a53 index 0ccfc4bc724..438ef752cd3 100644 --- a/soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8mn6_a53 +++ b/soc/nxp/imx/imx8m/Kconfig.defconfig.mimx8mn6_a53 @@ -1,4 +1,4 @@ -# Copyright 2022-2024 NXP +# Copyright 2022-2025 NXP # SPDX-License-Identifier: Apache-2.0 if SOC_MIMX8MN6_A53 @@ -16,6 +16,12 @@ config FLASH_BASE_ADDRESS config GIC_SAFE_CONFIG default y +# Disable data cache until MMU is enabled when booting from EL2 +config ARM64_DCACHE_ALL_OPS + default y +config ARM64_BOOT_DISABLE_DCACHE + default y + config NUM_IRQS default 240 diff --git a/soc/nxp/imx/imx9/imx91/Kconfig.defconfig.mimx91 b/soc/nxp/imx/imx9/imx91/Kconfig.defconfig.mimx91 index 748117545f0..0f21bb0c3bf 100644 --- a/soc/nxp/imx/imx9/imx91/Kconfig.defconfig.mimx91 +++ b/soc/nxp/imx/imx9/imx91/Kconfig.defconfig.mimx91 @@ -18,4 +18,10 @@ config NUM_IRQS config SYS_CLOCK_HW_CYCLES_PER_SEC default 24000000 +# Disable data cache until MMU is enabled when booting from EL2 +config ARM64_DCACHE_ALL_OPS + default y +config ARM64_BOOT_DISABLE_DCACHE + default y + endif diff --git a/soc/nxp/imx/imx9/imx93/Kconfig.defconfig.mimx93.a55 b/soc/nxp/imx/imx9/imx93/Kconfig.defconfig.mimx93.a55 index 187953e17a0..5845c03f137 100644 --- a/soc/nxp/imx/imx9/imx93/Kconfig.defconfig.mimx93.a55 +++ b/soc/nxp/imx/imx9/imx93/Kconfig.defconfig.mimx93.a55 @@ -1,4 +1,4 @@ -# Copyright 2022-2024 NXP +# Copyright 2022-2025 NXP # SPDX-License-Identifier: Apache-2.0 if SOC_MIMX9352_A55 @@ -16,6 +16,12 @@ config FLASH_BASE_ADDRESS config GIC_SAFE_CONFIG default y +# Disable data cache until MMU is enabled when booting from EL2 +config ARM64_DCACHE_ALL_OPS + default y +config ARM64_BOOT_DISABLE_DCACHE + default y + config NUM_IRQS default 240 diff --git a/soc/nxp/imx/imx9/imx95/Kconfig.defconfig.mimx95.a55 b/soc/nxp/imx/imx9/imx95/Kconfig.defconfig.mimx95.a55 index ce23fcbf2e4..0fc9f23d688 100644 --- a/soc/nxp/imx/imx9/imx95/Kconfig.defconfig.mimx95.a55 +++ b/soc/nxp/imx/imx9/imx95/Kconfig.defconfig.mimx95.a55 @@ -1,4 +1,4 @@ -# Copyright 2024 NXP +# Copyright 2024-2025 NXP # SPDX-License-Identifier: Apache-2.0 if SOC_MIMX9596_A55 @@ -16,6 +16,12 @@ config FLASH_BASE_ADDRESS config GIC_SAFE_CONFIG default y +# Disable data cache until MMU is enabled when booting from EL2 +config ARM64_DCACHE_ALL_OPS + default y +config ARM64_BOOT_DISABLE_DCACHE + default y + config NUM_IRQS default 320