drivers: flash: 4 byte address mode fix, if write enable is required

This fixes this bug:
https://github.com/zephyrproject-rtos/zephyr/issues/57498
If bit 1 is set, then a write enable is required before
sending the 0xb7 instruction to enable the 4 byte address
mode, which this PR implements.

Signed-off-by: Frank Buss <fb@frank-buss.de>
This commit is contained in:
Frank Buss 2023-05-03 01:35:01 +02:00 committed by Carles Cufí
commit e34a784b5a

View file

@ -717,8 +717,22 @@ static int setup_pages_layout(const struct device *dev)
} }
#endif /* CONFIG_FLASH_PAGE_LAYOUT */ #endif /* CONFIG_FLASH_PAGE_LAYOUT */
static int qspi_program_addr_4b(const struct device *dev) static int qspi_program_addr_4b(const struct device *dev, bool write_enable)
{ {
int ret;
/* Send write enable command, if required */
if (write_enable) {
QSPI_CommandTypeDef cmd_write_en = {
.Instruction = SPI_NOR_CMD_WREN,
.InstructionMode = QSPI_INSTRUCTION_1_LINE,
};
ret = qspi_send_cmd(dev, &cmd_write_en);
if (ret != 0) {
return ret;
}
}
/* Program the flash memory to use 4 bytes addressing */ /* Program the flash memory to use 4 bytes addressing */
QSPI_CommandTypeDef cmd = { QSPI_CommandTypeDef cmd = {
.Instruction = SPI_NOR_CMD_4BA, .Instruction = SPI_NOR_CMD_4BA,
@ -956,9 +970,10 @@ static int spi_nor_process_bfp(const struct device *dev,
* portion of flash description register 16 indicates * portion of flash description register 16 indicates
* if it is enough to use 0xB7 instruction without * if it is enough to use 0xB7 instruction without
* write enable to switch to 4 bytes addressing mode. * write enable to switch to 4 bytes addressing mode.
* If bit 1 is set, a write enable is needed.
*/ */
if (dw16.enter_4ba & 0x1) { if (dw16.enter_4ba & 0x3) {
rc = qspi_program_addr_4b(dev); rc = qspi_program_addr_4b(dev, dw16.enter_4ba & 2);
if (rc == 0) { if (rc == 0) {
data->flag_access_32bit = true; data->flag_access_32bit = true;
LOG_INF("Flash - address mode: 4B"); LOG_INF("Flash - address mode: 4B");