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soc: esp32xx: refactor clock and RTC subsystems

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The RTC subsystem in espressif's SOCs, among other tasks
is responsible for clock selection for CPU and for low
power domain clocks such as RTC_SLOW and RTC_FAST.

This commit allows for proper clock source and rate
selection for CPU, using the espressif,riscv and
espressif,xtensa-lx6/7 bindings.

It also enables clock selection for RTC_FAST and RTC_SLOW,
that impacts some peripherals, such as rtc_timer.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
This commit is contained in:
Lucas Tamborrino 2024-05-02 16:39:17 -03:00 • committed by Carles Cufí
commit e282b0ea84
79 changed files with 629 additions and 996 deletions
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2
soc/espressif/esp32s3/soc.c
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@ -197,8 +197,6 @@ void IRAM_ATTR __esp_platform_start(void)
esp_reset_reason_init();
esp_clk_init();
esp_timer_early_init();
#if CONFIG_SOC_ENABLE_APPCPU