soc: esp32xx: refactor clock and RTC subsystems
The RTC subsystem in espressif's SOCs, among other tasks is responsible for clock selection for CPU and for low power domain clocks such as RTC_SLOW and RTC_FAST. This commit allows for proper clock source and rate selection for CPU, using the espressif,riscv and espressif,xtensa-lx6/7 bindings. It also enables clock selection for RTC_FAST and RTC_SLOW, that impacts some peripherals, such as rtc_timer. Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
This commit is contained in:
parent
a8dddabdb8
commit
e282b0ea84
79 changed files with 629 additions and 996 deletions
|
@ -18,14 +18,6 @@
|
|||
};
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
clock-frequency = <ESP32_CLK_CPU_240M>;
|
||||
};
|
||||
|
||||
&cpu1 {
|
||||
clock-frequency = <ESP32_CLK_CPU_240M>;
|
||||
};
|
||||
|
||||
&ipm0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue