soc: nuvoton: numaker: add support for m2l31x series

Add initial support for nuvoton numaker m2l31x SoC series
including basic init.

Signed-off-by: cyliang tw <cyliang@nuvoton.com>
This commit is contained in:
cyliang tw 2024-03-11 14:59:20 +08:00 committed by Alberto Escolar
commit e22958ceaf
12 changed files with 836 additions and 0 deletions

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@ -0,0 +1,9 @@
# Copyright (c) 2024 Nuvoton Technology Corporation.
#
# SPDX-License-Identifier: Apache-2.0
zephyr_sources(soc.c)
zephyr_include_directories(.)
set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "")

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# Copyright (c) 2024 Nuvoton Technology Corporation.
#
# SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_M2L31X
select ARM
select CPU_CORTEX_M23
select CPU_CORTEX_M_HAS_SYSTICK
select CPU_CORTEX_M_HAS_DWT
select CPU_CORTEX_M_HAS_VTOR
select CPU_HAS_ARM_MPU
config SOC_M2L31XXX
select HAS_NUMAKER_HAL

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# Copyright (c) 2024 Nuvoton Technology Corporation.
#
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_M2L31X
rsource "Kconfig.defconfig.m2l31*"
endif # SOC_SERIES_M2L31X

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# Copyright (c) 2024 Nuvoton Technology Corporation.
#
# SPDX-License-Identifier: Apache-2.0
if SOC_M2L31XXX
config NUM_IRQS
default 143
endif # SOC_M2L31XXX

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# Copyright (c) 2024 Nuvoton Technology Corporation.
#
# SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_M2L31X
bool
select SOC_FAMILY_NUMAKER
help
Enable support for Nuvoton M2L31X MCU series
config SOC_M2L31XXX
bool
select SOC_SERIES_M2L31X
config SOC_SERIES
default "m2l31x" if SOC_SERIES_M2L31X
config SOC
default "m2l31xxx" if SOC_M2L31XXX

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/*
* Copyright (c) 2024 Nuvoton Technology Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/devicetree.h>
#include <zephyr/drivers/clock_control/clock_control_numaker.h>
/* Hardware and starter kit includes. */
#include <NuMicro.h>
void z_arm_platform_init(void)
{
SystemInit();
/* Unlock protected registers */
SYS_UnlockReg();
/*
* -------------------
* Init System Clock
* -------------------
*/
#if DT_NODE_HAS_PROP(DT_NODELABEL(scc), hxt)
/* Enable/disable 4~24 MHz external crystal oscillator (HXT) */
if (DT_ENUM_IDX(DT_NODELABEL(scc), hxt) == NUMAKER_SCC_CLKSW_ENABLE) {
CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
/* Wait for HXT clock ready */
CLK_WaitClockReady(CLK_STATUS_HXTSTB_Msk);
} else if (DT_ENUM_IDX(DT_NODELABEL(scc), hxt) == NUMAKER_SCC_CLKSW_DISABLE) {
CLK_DisableXtalRC(CLK_PWRCTL_HXTEN_Msk);
}
#endif
#if DT_NODE_HAS_PROP(DT_NODELABEL(scc), lxt)
/* Enable/disable 32.768 kHz low-speed external crystal oscillator (LXT) */
if (DT_ENUM_IDX(DT_NODELABEL(scc), lxt) == NUMAKER_SCC_CLKSW_ENABLE) {
CLK_EnableXtalRC(CLK_PWRCTL_LXTEN_Msk);
/* Wait for LXT clock ready */
CLK_WaitClockReady(CLK_STATUS_LXTSTB_Msk);
} else if (DT_ENUM_IDX(DT_NODELABEL(scc), lxt) == NUMAKER_SCC_CLKSW_DISABLE) {
CLK_DisableXtalRC(CLK_PWRCTL_LXTEN_Msk);
}
#endif
/* Enable 12 MHz high-speed internal RC oscillator (HIRC) */
CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk);
/* Wait for HIRC clock ready */
CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
/* Enable 32 KHz low-speed internal RC oscillator (LIRC) */
CLK_EnableXtalRC(CLK_PWRCTL_LIRCEN_Msk);
/* Wait for LIRC clock ready */
CLK_WaitClockReady(CLK_STATUS_LIRCSTB_Msk);
#if DT_NODE_HAS_PROP(DT_NODELABEL(scc), hirc48)
/* Enable/disable 48 MHz high-speed internal RC oscillator (HIRC48) */
if (DT_ENUM_IDX(DT_NODELABEL(scc), hirc48) == NUMAKER_SCC_CLKSW_ENABLE) {
CLK_EnableXtalRC(CLK_PWRCTL_HIRC48EN_Msk);
/* Wait for HIRC48 clock ready */
CLK_WaitClockReady(CLK_STATUS_HIRC48STB_Msk);
} else if (DT_ENUM_IDX(DT_NODELABEL(scc), hirc48) == NUMAKER_SCC_CLKSW_DISABLE) {
CLK_DisableXtalRC(CLK_PWRCTL_HIRC48EN_Msk);
}
#endif
#if DT_NODE_HAS_PROP(DT_NODELABEL(scc), clk_pclkdiv)
/* Set CLK_PCLKDIV register on request */
CLK->PCLKDIV = DT_PROP(DT_NODELABEL(scc), clk_pclkdiv);
#endif
#if DT_NODE_HAS_PROP(DT_NODELABEL(scc), core_clock)
/* Set core clock (HCLK) on request */
CLK_SetCoreClock(DT_PROP(DT_NODELABEL(scc), core_clock));
#endif
/*
* Update System Core Clock
* User can use SystemCoreClockUpdate() to calculate SystemCoreClock.
*/
SystemCoreClockUpdate();
/* Lock protected registers */
SYS_LockReg();
}

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/*
* Copyright (c) 2024 Nuvoton Technology Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_SOC_ARM_NUVOTON_M2L31X_SOC_H_
#define ZEPHYR_SOC_ARM_NUVOTON_M2L31X_SOC_H_
/* Hardware and starter kit includes. */
#include <NuMicro.h>
#endif /* ZEPHYR_SOC_ARM_NUVOTON_M2L31X_SOC_H_*/

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@ -4,3 +4,6 @@ family:
- name: m46x
socs:
- name: m467
- name: m2l31x
socs:
- name: m2l31xxx