drivers: can: stm32: fdcan: message RAM layout is fixed
The Message RAM layout used by the STM32 FDCAN IPs contains a fixed number of elements, even though the software can opt to use less standard/extended filter elements. Change the BUILD_ASSERT() statements to reflect this. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
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1 changed files with 3 additions and 3 deletions
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@ -635,9 +635,9 @@ static const struct can_mcan_ops can_stm32fd_ops = {
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.clear_mram = can_stm32fd_clear_mram,
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};
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/* Assert that the Message RAM configuration meets the hardware limitiations */
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BUILD_ASSERT(NUM_STD_FILTER_ELEMENTS <= 28, "Standard filter elements must be 28");
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BUILD_ASSERT(NUM_EXT_FILTER_ELEMENTS <= 8, "Extended filter elements must be 8");
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/* Assert that the Message RAM configuration matches the fixed hardware configuration */
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BUILD_ASSERT(NUM_STD_FILTER_ELEMENTS == 28, "Standard filter elements must be 28");
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BUILD_ASSERT(NUM_EXT_FILTER_ELEMENTS == 8, "Extended filter elements must be 8");
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BUILD_ASSERT(NUM_RX_FIFO0_ELEMENTS == 3, "Rx FIFO 0 elements must be 3");
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BUILD_ASSERT(NUM_RX_FIFO1_ELEMENTS == 3, "Rx FIFO 1 elements must be 3");
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BUILD_ASSERT(NUM_RX_BUF_ELEMENTS == 0, "Rx Buffer elements must be 0");
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