From de659f9f6109709ec13625e3bbfd83d9d1785964 Mon Sep 17 00:00:00 2001 From: Henrik Brix Andersen Date: Sun, 21 May 2023 21:22:02 +0200 Subject: [PATCH] drivers: can: stm32: fdcan: message RAM layout is fixed The Message RAM layout used by the STM32 FDCAN IPs contains a fixed number of elements, even though the software can opt to use less standard/extended filter elements. Change the BUILD_ASSERT() statements to reflect this. Signed-off-by: Henrik Brix Andersen --- drivers/can/can_stm32fd.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/can/can_stm32fd.c b/drivers/can/can_stm32fd.c index ae5ee52479d..7b9f9e964bd 100644 --- a/drivers/can/can_stm32fd.c +++ b/drivers/can/can_stm32fd.c @@ -635,9 +635,9 @@ static const struct can_mcan_ops can_stm32fd_ops = { .clear_mram = can_stm32fd_clear_mram, }; -/* Assert that the Message RAM configuration meets the hardware limitiations */ -BUILD_ASSERT(NUM_STD_FILTER_ELEMENTS <= 28, "Standard filter elements must be 28"); -BUILD_ASSERT(NUM_EXT_FILTER_ELEMENTS <= 8, "Extended filter elements must be 8"); +/* Assert that the Message RAM configuration matches the fixed hardware configuration */ +BUILD_ASSERT(NUM_STD_FILTER_ELEMENTS == 28, "Standard filter elements must be 28"); +BUILD_ASSERT(NUM_EXT_FILTER_ELEMENTS == 8, "Extended filter elements must be 8"); BUILD_ASSERT(NUM_RX_FIFO0_ELEMENTS == 3, "Rx FIFO 0 elements must be 3"); BUILD_ASSERT(NUM_RX_FIFO1_ELEMENTS == 3, "Rx FIFO 1 elements must be 3"); BUILD_ASSERT(NUM_RX_BUF_ELEMENTS == 0, "Rx Buffer elements must be 0");