arm: boards: mps3_an547: Add board support for AN547 on MPS3
Add initial board support for the MPS3 AN547. The board support is based on the MPS2+ AN521 board support. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala
Kumar Gala
parent
52d15d21bc
commit
da903e423e
8 changed files with 622 additions and 0 deletions
6
boards/arm/mps3_an547/Kconfig.board
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6
boards/arm/mps3_an547/Kconfig.board
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# Copyright (c) 2021 Linaro Limited
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_MPS3_AN547
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bool "Arm Cortex-M55 (Corstone-300, SSE-300 w/Ethos-U55) on MPS3 (AN547)"
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depends on SOC_MPS3_AN547
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30
boards/arm/mps3_an547/Kconfig.defconfig
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boards/arm/mps3_an547/Kconfig.defconfig
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# Copyright (c) 2018-2021 Linaro Limited
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_MPS3_AN547
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config BOARD
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default "mps3_an547"
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if GPIO
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config GPIO_CMSDK_AHB
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default y
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endif # GPIO
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if SERIAL
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config UART_CMSDK_APB
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default y
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config UART_INTERRUPT_DRIVEN
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default y
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endif # SERIAL
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config I2C_SBCON
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default y
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depends on I2C
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endif
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BIN
boards/arm/mps3_an547/doc/img/mps3_an547.png
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BIN
boards/arm/mps3_an547/doc/img/mps3_an547.png
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Binary file not shown.
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After Width: | Height: | Size: 108 KiB |
191
boards/arm/mps3_an547/doc/index.rst
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boards/arm/mps3_an547/doc/index.rst
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.. _mps3_an547_board:
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ARM MPS3 AN547
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###############
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Overview
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********
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The mps3_an547 board configuration is used by Zephyr applications that run
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on the MPS3 AN547 board. It provides support for the MPS3 AN547 ARM Cortex-M55
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CPU and the following devices:
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- Nested Vectored Interrupt Controller (NVIC)
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- System Tick System Clock (SYSTICK)
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- Cortex-M System Design Kit GPIO
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- Cortex-M System Design Kit UART
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- Ethos-U55 NPU
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.. image:: img/mps3_an547.png
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:width: 666px
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:align: center
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:height: 546px
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:alt: ARM MPS3 AN547
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More information about the board can be found at the `MPS3 FPGA Website`_.
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Hardware
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********
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ARM MPS3 AN547 provides the following hardware components:
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- ARM Cortex-M55
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- Soft Macro Model (SMM) implementation of SSE-300 subsystem
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- Memory
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- 8MB BRAM
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- 4GB DDR4 SODIMM (by default, upgradeable to 8GB)
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- 16GB eMMC
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- 8MB QSPI Flash
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- Debug
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- P‐JTAG, F-JTAG, SWD, 4-bit trace, 16-bit trace
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- Four serial ports over USB
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- Interface
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- AHB GPIO
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- UART
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- SPI
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- I2C
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- I2S
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- Color LCD serial interface
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- Ethernet
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- VGA
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- On-board Peripherals
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- Color LCD
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- 10 LEDs
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- 8 Switches
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- 2 user push buttons
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Supported Features
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===================
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The mps3_an547 board configuration supports the following hardware features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| SYSTICK | on-chip | systick |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port-polling; |
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| | | serial port-interrupt |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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Other hardware features are not currently supported by the port.
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See the `MPS3 FPGA Website`_ for a complete list of MPS3 AN547 board hardware
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features.
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The default configuration can be found in the defconfig file:
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``boards/arm/mps3_an547/mps3_an547_defconfig``.
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For mode details refer to `MPS3 AN547 Technical Reference Manual (TRM)`_.
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Serial Port
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===========
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The MPS3 AN547 has six UARTs. The Zephyr console output by default, uses
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UART0, which is exposed over the Debug USB interface (J8).
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Serial port 0 on the Debug USB interface is the MCC board control console.
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Serial port 1 on the Debug USB interface is connected to UART 0.
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Serial port 2 on the Debug USB interface is connected to UART 1.
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Serial port 3 on the Debug USB interface is connected to UART 2.
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Programming and Debugging
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*************************
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Flashing
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========
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MPS3 AN547 provides:
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- A USB connection to the host computer, which exposes Mass Storage and
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CMSIS-DAP, and serial ports.
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Building an application
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-----------------------
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You can build applications in the usual way. Here is an example for
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the :ref:`hello_world` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: mps3_an547
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:goals: build
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Open a serial terminal (minicom, putty, etc.) with the following settings:
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- Speed: 115200
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- Data: 8 bits
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- Parity: None
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- Stop bits: 1
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Reset the board, and you should see the following message on the corresponding
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serial port:
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.. code-block:: console
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Hello World! mps3_an547
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Uploading an application to MPS3 AN547
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---------------------------------------
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Applications can be in elf, hex or bin format. The binaries are flashed when
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the board boots up, using files stored on the on-board Micro SD card. The
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Motherboard Configuration Controller (MCC) is responsible for loading the FPGA
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image and binaries.
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Connect the MPS3 to your host computer using the USB port. You should see a
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USB connection exposing a Mass Storage (``V2M-MPS3`` by default).
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The update requires 3 steps:
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1. Copy application files to ``<MPS3 device name>/SOFTWARE/``.
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2. Open ``<MPS3 device name>/MB/HBI0309C/AN547/images.txt``.
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3. Update the ``AN547/images.txt`` file as follows:
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.. code-block:: bash
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TITLE: Versatile Express Images Configuration File
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[IMAGES]
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TOTALIMAGES: 1 ;Number of Images (Max: 32)
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IMAGE0ADDRESS: 0x01000000 ;Please select the required executable program
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IMAGE0FILE: \SOFTWARE\zephyr.elf
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Reset the board, and you should see the following message on the corresponding
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serial port:
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.. code-block:: console
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Hello World! mps3_an547
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.. _MPS3 FPGA Website:
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https://developer.arm.com/tools-and-software/development-boards/fpga-prototyping-boards/mps3
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.. _MPS3 AN547 Technical Reference Manual (TRM):
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https://developer.arm.com/-/media/Arm%20Developer%20Community/PDF/DAI0547B_SSE300_PLUS_U55_FPGA_for_mps3.pdf
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.. _MPS3 FPGA Prototyping Board Technical Reference Manual (TRM):
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https://developer.arm.com/documentation/100765/latest
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.. _Cortex M55 Generic User Guide:
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https://developer.arm.com/documentation/101051/latest
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.. _Corelink SSE-300 Example Subsystem:
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https://developer.arm.com/documentation/101772/latest
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192
boards/arm/mps3_an547/mps3_an547-common.dtsi
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boards/arm/mps3_an547/mps3_an547-common.dtsi
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/*
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* Copyright (c) 2019-2021 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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sysclk: system-clock {
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compatible = "fixed-clock";
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clock-frequency = <25000000>;
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#clock-cells = <0>;
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};
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gpio0: gpio@1100000 {
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compatible = "arm,cmsdk-gpio";
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reg = <0x1100000 0x1000>;
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interrupts = <69 3>;
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gpio-controller;
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#gpio-cells = <2>;
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label = "GPIO_0";
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};
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gpio1: gpio@1101000 {
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compatible = "arm,cmsdk-gpio";
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reg = <0x1101000 0x1000>;
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interrupts = <70 3>;
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gpio-controller;
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#gpio-cells = <2>;
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label = "GPIO_1";
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};
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gpio2: gpio@1102000 {
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compatible = "arm,cmsdk-gpio";
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reg = <0x1102000 0x1000>;
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interrupts = <71 3>;
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gpio-controller;
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#gpio-cells = <2>;
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label = "GPIO_2";
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};
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gpio3: gpio@1103000 {
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compatible = "arm,cmsdk-gpio";
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reg = <0x1103000 0x1000>;
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interrupts = <72 3>;
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gpio-controller;
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#gpio-cells = <2>;
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label = "GPIO_3";
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};
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eth0: eth@1400000 {
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/* Linux has "smsc,lan9115" */
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compatible = "smsc,lan9220";
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/* Actual reg range is ~0x200 */
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reg = <0x1400000 0x100000>;
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label = "eth0";
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interrupts = <49 3>;
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};
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i2c_touch: i2c@9200000 {
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compatible = "arm,versatile-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x9200000 0x1000>;
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label = "I2C_TOUCH";
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};
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i2c_audio_conf: i2c@9201000 {
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compatible = "arm,versatile-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x9201000 0x1000>;
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label = "I2C_AUDIO_CONF";
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};
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i2c_shield0: i2c@9203000 {
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compatible = "arm,versatile-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x9203000 0x1000>;
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label = "I2C_SHIELD0";
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};
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i2c_shield1: i2c@9204000 {
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compatible = "arm,versatile-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x9204000 0x1000>;
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label = "I2C_SHIELD1";
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};
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i2c_ddr4_eeprom: i2c@9208000 {
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compatible = "arm,versatile-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x9208000 0x1000>;
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label = "DDR4_EEPROM";
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};
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gpio_led0: mps3_fpgaio@9302000 {
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compatible = "arm,mps3-fpgaio-gpio";
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reg = <0x9302000 0x4>;
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gpio-controller;
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#gpio-cells = <1>;
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ngpios = <8>;
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label = "FPGA_LED0";
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};
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gpio_button: mps3_fpgaio@9302008 {
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compatible = "arm,mps3-fpgaio-gpio";
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reg = <0x9302008 0x4>;
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gpio-controller;
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#gpio-cells = <1>;
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ngpios = <2>;
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label = "FPGA_BUTTON";
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};
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gpio_misc: mps3_fpgaio@930204c {
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compatible = "arm,mps3-fpgaio-gpio";
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reg = <0x930204c 0x4>;
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gpio-controller;
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#gpio-cells = <1>;
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ngpios = <3>;
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label = "FPGA_MISC";
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};
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uart0: uart@9303000 {
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compatible = "arm,cmsdk-uart";
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reg = <0x9303000 0x1000>;
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interrupts = <34 3 33 3>;
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interrupt-names = "tx", "rx";
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clocks = <&sysclk>;
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current-speed = <115200>;
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label = "UART_0";
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};
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uart1: uart@9304000 {
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compatible = "arm,cmsdk-uart";
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reg = <0x9304000 0x1000>;
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interrupts = <36 3 35 3>;
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interrupt-names = "tx", "rx";
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clocks = <&sysclk>;
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current-speed = <115200>;
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label = "UART_1";
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};
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uart2: uart@9305000 {
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compatible = "arm,cmsdk-uart";
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reg = <0x9305000 0x1000>;
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interrupts = <38 3 37 3>;
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interrupt-names = "tx", "rx";
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clocks = <&sysclk>;
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current-speed = <115200>;
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label = "UART_2";
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};
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uart3: uart@9306000 {
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compatible = "arm,cmsdk-uart";
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reg = <0x9306000 0x1000>;
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interrupts = <40 3 39 3>;
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interrupt-names = "tx", "rx";
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||||||
|
clocks = <&sysclk>;
|
||||||
|
current-speed = <115200>;
|
||||||
|
label = "UART_3";
|
||||||
|
};
|
||||||
|
|
||||||
|
uart4: uart@9307000 {
|
||||||
|
compatible = "arm,cmsdk-uart";
|
||||||
|
reg = <0x9307000 0x1000>;
|
||||||
|
interrupts = <42 3 41 3>;
|
||||||
|
interrupt-names = "tx", "rx";
|
||||||
|
clocks = <&sysclk>;
|
||||||
|
current-speed = <115200>;
|
||||||
|
label = "UART_4";
|
||||||
|
};
|
||||||
|
|
||||||
|
uart5: uart@9308000 {
|
||||||
|
compatible = "arm,cmsdk-uart";
|
||||||
|
status = "disabled";
|
||||||
|
reg = <0x9308000 0x1000>;
|
||||||
|
interrupt-names = "tx", "rx";
|
||||||
|
interrupts = <126 3 125 3>;
|
||||||
|
clocks = <&sysclk>;
|
||||||
|
current-speed = <115200>;
|
||||||
|
label = "UART_5";
|
||||||
|
};
|
||||||
154
boards/arm/mps3_an547/mps3_an547.dts
Normal file
154
boards/arm/mps3_an547/mps3_an547.dts
Normal file
|
|
@ -0,0 +1,154 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2018-2021 Linaro Limited
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
|
||||||
|
#include <arm/armv8.1-m.dtsi>
|
||||||
|
#include <dt-bindings/i2c/i2c.h>
|
||||||
|
#include <mem.h>
|
||||||
|
|
||||||
|
/ {
|
||||||
|
compatible = "arm,mps3-an547";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
|
||||||
|
aliases {
|
||||||
|
led0 = &led_0;
|
||||||
|
led1 = &led_1;
|
||||||
|
sw0 = &user_button_0;
|
||||||
|
sw1 = &user_button_1;
|
||||||
|
};
|
||||||
|
|
||||||
|
chosen {
|
||||||
|
zephyr,console = &uart0;
|
||||||
|
zephyr,shell-uart = &uart0;
|
||||||
|
zephyr,sram = &dtcm;
|
||||||
|
zephyr,flash = &itcm;
|
||||||
|
};
|
||||||
|
|
||||||
|
leds {
|
||||||
|
compatible = "gpio-leds";
|
||||||
|
led_0: led_0 {
|
||||||
|
gpios = <&gpio_led0 0>;
|
||||||
|
label = "USERLED0";
|
||||||
|
};
|
||||||
|
led_1: led_1 {
|
||||||
|
gpios = <&gpio_led0 1>;
|
||||||
|
label = "USERLED1";
|
||||||
|
};
|
||||||
|
led_2: led_2 {
|
||||||
|
gpios = <&gpio_led0 2>;
|
||||||
|
label = "USERLED2";
|
||||||
|
};
|
||||||
|
led_3: led_3 {
|
||||||
|
gpios = <&gpio_led0 3>;
|
||||||
|
label = "USERLED3";
|
||||||
|
};
|
||||||
|
led_4: led_4 {
|
||||||
|
gpios = <&gpio_led0 4>;
|
||||||
|
label = "USERLED4";
|
||||||
|
};
|
||||||
|
led_5: led_5 {
|
||||||
|
gpios = <&gpio_led0 5>;
|
||||||
|
label = "USERLED5";
|
||||||
|
};
|
||||||
|
led_6: led_6 {
|
||||||
|
gpios = <&gpio_led0 6>;
|
||||||
|
label = "USERLED6";
|
||||||
|
};
|
||||||
|
led_7: led_7 {
|
||||||
|
gpios = <&gpio_led0 7>;
|
||||||
|
label = "USERLED7";
|
||||||
|
};
|
||||||
|
led_8: led_8 {
|
||||||
|
gpios = <&gpio_led0 8>;
|
||||||
|
label = "PB1LED";
|
||||||
|
};
|
||||||
|
led_9: led_9 {
|
||||||
|
gpios = <&gpio_led0 9>;
|
||||||
|
label = "PB2LED";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
gpio_keys {
|
||||||
|
compatible = "gpio-keys";
|
||||||
|
user_button_0: button_0 {
|
||||||
|
label = "USERPB0";
|
||||||
|
gpios = <&gpio_button 0>;
|
||||||
|
};
|
||||||
|
user_button_1: button_1 {
|
||||||
|
label = "USERPB1";
|
||||||
|
gpios = <&gpio_button 1>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
cpus {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
cpu@0 {
|
||||||
|
device_type = "cpu";
|
||||||
|
compatible = "arm,cortex-m55";
|
||||||
|
reg = <0>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
|
||||||
|
mpu: mpu@e000ed90 {
|
||||||
|
compatible = "arm,armv8.1m-mpu";
|
||||||
|
reg = <0xe000ed90 0x40>;
|
||||||
|
arm,num-mpu-regions = <16>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
/* We utilize the secure addresses, if you subtract 0x10000000
|
||||||
|
* you'll get the non-secure alias
|
||||||
|
*/
|
||||||
|
itcm: itcm@10000000 { /* alias @ 0x0 */
|
||||||
|
reg = <0x10000000 DT_SIZE_K(512)>;
|
||||||
|
};
|
||||||
|
|
||||||
|
sram: sram@11000000 { /* alias @ 0x01000000 */
|
||||||
|
compatible = "mmio-sram";
|
||||||
|
reg = <0x11000000 DT_SIZE_M(2)>;
|
||||||
|
};
|
||||||
|
|
||||||
|
dtcm: dtcm@30000000 { /* alias @ 0x20000000 */
|
||||||
|
reg = <0x30000000 DT_SIZE_K(512)>;
|
||||||
|
};
|
||||||
|
|
||||||
|
isram: sram@31000000 {/* alias @ 0x21000000 */
|
||||||
|
compatible = "mmio-sram";
|
||||||
|
reg = <0x31000000 DT_SIZE_M(4)>;
|
||||||
|
};
|
||||||
|
|
||||||
|
/* DDR4 - 2G, alternates non-secure/secure every 256M */
|
||||||
|
ddr4: memory@60000000 {
|
||||||
|
device_type = "memory";
|
||||||
|
reg = <0x60000000 DT_SIZE_M(256)
|
||||||
|
0x70000000 DT_SIZE_M(256)
|
||||||
|
0x80000000 DT_SIZE_M(256)
|
||||||
|
0x90000000 DT_SIZE_M(256)
|
||||||
|
0xa0000000 DT_SIZE_M(256)
|
||||||
|
0xb0000000 DT_SIZE_M(256)
|
||||||
|
0xc0000000 DT_SIZE_M(256)
|
||||||
|
0xd0000000 DT_SIZE_M(256)>;
|
||||||
|
};
|
||||||
|
|
||||||
|
soc {
|
||||||
|
peripheral@50000000 {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
ranges = <0x0 0x50000000 0x10000000>;
|
||||||
|
|
||||||
|
#include "mps3_an547-common.dtsi"
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&nvic {
|
||||||
|
arm,num-irq-priority-bits = <3>;
|
||||||
|
};
|
||||||
22
boards/arm/mps3_an547/mps3_an547.yaml
Normal file
22
boards/arm/mps3_an547/mps3_an547.yaml
Normal file
|
|
@ -0,0 +1,22 @@
|
||||||
|
#
|
||||||
|
# Copyright (c) 2019-2021 Linaro Limited
|
||||||
|
#
|
||||||
|
# SPDX-License-Identifier: Apache-2.0
|
||||||
|
#
|
||||||
|
|
||||||
|
identifier: mps3_an547
|
||||||
|
name: Arm MPS3-AN547
|
||||||
|
type: mcu
|
||||||
|
arch: arm
|
||||||
|
toolchain:
|
||||||
|
- gnuarmemb
|
||||||
|
- zephyr
|
||||||
|
- xtools
|
||||||
|
supported:
|
||||||
|
- gpio
|
||||||
|
testing:
|
||||||
|
ignore_tags:
|
||||||
|
- drivers
|
||||||
|
- bluetooth
|
||||||
|
- net
|
||||||
|
- timer
|
||||||
27
boards/arm/mps3_an547/mps3_an547_defconfig
Normal file
27
boards/arm/mps3_an547/mps3_an547_defconfig
Normal file
|
|
@ -0,0 +1,27 @@
|
||||||
|
#
|
||||||
|
# Copyright (c) 2018-2021 Linaro Limited
|
||||||
|
#
|
||||||
|
# SPDX-License-Identifier: Apache-2.0
|
||||||
|
#
|
||||||
|
|
||||||
|
CONFIG_SOC_SERIES_MPS3=y
|
||||||
|
CONFIG_SOC_MPS3_AN547=y
|
||||||
|
CONFIG_BOARD_MPS3_AN547=y
|
||||||
|
CONFIG_CORTEX_M_SYSTICK=y
|
||||||
|
CONFIG_RUNTIME_NMI=y
|
||||||
|
CONFIG_ARM_TRUSTZONE_M=y
|
||||||
|
CONFIG_ARM_MPU=y
|
||||||
|
|
||||||
|
# GPIOs
|
||||||
|
CONFIG_GPIO=y
|
||||||
|
|
||||||
|
# Serial
|
||||||
|
CONFIG_CONSOLE=y
|
||||||
|
CONFIG_UART_CONSOLE=y
|
||||||
|
CONFIG_SERIAL=y
|
||||||
|
CONFIG_UART_CMSDK_APB=y
|
||||||
|
|
||||||
|
# Build a Secure firmware image
|
||||||
|
CONFIG_TRUSTED_EXECUTION_SECURE=y
|
||||||
|
|
||||||
|
CONFIG_I2C=y
|
||||||
Loading…
Add table
Add a link
Reference in a new issue