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dts: arm: stm32g0: add pwr node and wkup-pins

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WKUP3 is only available for g0b0/1 and g0c1 variants.

WKUP5 is only available in larger packages. However, package sizes
are currently not considered in the devicetree file schema for STM32.

Signed-off-by: Martin Jäger <martin@libre.solar>
This commit is contained in:
Martin Jäger 2025-04-29 22:32:29 +02:00 • committed by Benjamin Cabé
commit d65149e210
3 changed files with 56 additions and 0 deletions
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42
dts/arm/st/g0/stm32g0.dtsi
View file

@ -16,6 +16,7 @@
#include <zephyr/dt-bindings/dma/stm32_dma.h> #include <zephyr/dt-bindings/dma/stm32_dma.h>
#include <zephyr/dt-bindings/adc/adc.h> #include <zephyr/dt-bindings/adc/adc.h>
#include <zephyr/dt-bindings/adc/stm32l4_adc.h> #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
#include <zephyr/dt-bindings/power/stm32_pwr.h>
#include <zephyr/dt-bindings/pwm/stm32_pwm.h> #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
#include <zephyr/dt-bindings/reset/stm32g0_reset.h> #include <zephyr/dt-bindings/reset/stm32g0_reset.h>
#include <freq.h> #include <freq.h>
@ -448,6 +449,47 @@
dma-requests= <49>; dma-requests= <49>;
status = "disabled"; status = "disabled";
}; };
pwr: power@40007000 {
compatible = "st,stm32-pwr";
reg = <0x40007000 0x400>; /* PWR register bank */
status = "disabled";
wkup-pins-nb = <6>; /* 6 system wake-up pins */
wkup-pins-pol;
wkup-pins-pupd;
#address-cells = <1>;
#size-cells = <0>;
wkup-pin@1 {
reg = <0x1>;
wkup-gpios = <&gpioa 0 STM32_PWR_WKUP_PIN_NOT_MUXED>;
};
wkup-pin@2 {
reg = <0x2>;
wkup-gpios = <&gpioa 4 STM32_PWR_WKUP_PIN_NOT_MUXED>,
<&gpioc 13 STM32_PWR_WKUP_PIN_NOT_MUXED>;
};
/* wkup-pin@3 only available for g0b0/1 and g0c1 variants */
wkup-pin@4 {
reg = <0x4>;
wkup-gpios = <&gpioa 2 STM32_PWR_WKUP_PIN_NOT_MUXED>;
};
wkup-pin@5 {
reg = <0x5>;
wkup-gpios = <&gpioc 5 STM32_PWR_WKUP_PIN_NOT_MUXED>;
};
wkup-pin@6 {
reg = <0x6>;
wkup-gpios = <&gpiob 5 STM32_PWR_WKUP_PIN_NOT_MUXED>;
};
};
}; };
die_temp: dietemp { die_temp: dietemp {

7
dts/arm/st/g0/stm32g0b0.dtsi
View file

@ -105,6 +105,13 @@
<&rcc STM32_SRC_HSI48 USB_SEL(0)>; <&rcc STM32_SRC_HSI48 USB_SEL(0)>;
status = "disabled"; status = "disabled";
}; };
pwr: power@40007000 {
wkup-pin@3 {
reg = <0x3>;
wkup-gpios = <&gpioe 6 STM32_PWR_WKUP_PIN_NOT_MUXED>;
};
};
}; };
usb_fs_phy: usbphy { usb_fs_phy: usbphy {

7
dts/arm/st/g0/stm32g0b1.dtsi
View file

@ -149,6 +149,13 @@
<&rcc STM32_SRC_HSI48 USB_SEL(0)>; <&rcc STM32_SRC_HSI48 USB_SEL(0)>;
status = "disabled"; status = "disabled";
}; };
pwr: power@40007000 {
wkup-pin@3 {
reg = <0x3>;
wkup-gpios = <&gpioe 6 STM32_PWR_WKUP_PIN_NOT_MUXED>;
};
};
}; };
usb_fs_phy: usbphy { usb_fs_phy: usbphy {