x86: mmu: add PTE_LEVEL
For code clarity, add a macro indicating the paging level for leaf page tables. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
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1 changed files with 6 additions and 5 deletions
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@ -172,6 +172,7 @@ static const struct paging_level paging_levels[] = {
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};
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#define NUM_LEVELS ARRAY_SIZE(paging_levels)
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#define PTE_LEVEL (NUM_LEVELS - 1)
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/*
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* Macros for reserving space for page tables
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@ -331,7 +332,7 @@ static inline size_t get_table_scope(int level)
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*/
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static inline bool is_leaf(int level, pentry_t entry)
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{
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if (level == NUM_LEVELS - 1) {
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if (level == PTE_LEVEL) {
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/* Always true for PTE */
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return true;
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}
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@ -540,7 +541,7 @@ static void dump_ptables(pentry_t *table, uint8_t *base, int level)
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print_entries(table, base, level, info->entries);
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/* Check if we're a page table */
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if (level == (NUM_LEVELS - 1)) {
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if (level == PTE_LEVEL) {
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return;
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}
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@ -742,7 +743,7 @@ static inline pentry_t pte_finalize_value(pentry_t val, bool user_table)
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(uintptr_t)&z_shared_kernel_page_start;
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if (user_table && (val & MMU_US) == 0 && (val & MMU_P) != 0 &&
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get_entry_phys(val, NUM_LEVELS - 1) != shared_phys_addr) {
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get_entry_phys(val, PTE_LEVEL) != shared_phys_addr) {
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val = ~val;
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}
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#endif
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@ -920,7 +921,7 @@ static int page_map_set(pentry_t *ptables, void *virt, pentry_t entry_val,
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entryp = &table[index];
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/* Check if we're a PTE */
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if (level == (NUM_LEVELS - 1)) {
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if (level == PTE_LEVEL) {
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pentry_t old_val = pte_atomic_update(entryp, entry_val,
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mask, options);
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if (old_val_ptr != NULL) {
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@ -1445,7 +1446,7 @@ void arch_mem_domain_destroy(struct k_mem_domain *domain)
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*/
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static int copy_page_table(pentry_t *dst, pentry_t *src, int level)
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{
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if (level == (NUM_LEVELS - 1)) {
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if (level == PTE_LEVEL) {
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/* Base case: leaf page table */
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for (int i = 0; i < get_num_entries(level); i++) {
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dst[i] = pte_finalize_value(reset_pte(src[i]), true);
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