x86: mmu: fix ipi comments
Delete an incorrect one and note a limitation of the current IPI implementation. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
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1 changed files with 3 additions and 2 deletions
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@ -347,8 +347,6 @@ static inline void tlb_flush_page(void *addr)
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char *page = (char *)addr;
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__asm__ ("invlpg %0" :: "m" (*page));
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/* TODO: Need to implement TLB shootdown for SMP */
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}
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#ifdef CONFIG_X86_KPTI
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@ -388,6 +386,9 @@ void z_x86_tlb_ipi(const void *arg)
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z_x86_cr3_set(ptables);
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}
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/* NOTE: This is not synchronous and the actual flush takes place some short
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* time after this exits.
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*/
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static inline void tlb_shootdown(void)
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{
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z_loapic_ipi(0, LOAPIC_ICR_IPI_OTHERS, CONFIG_TLB_IPI_VECTOR);
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