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x86: mmu: fix ipi comments

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Delete an incorrect one and note a limitation of the current
IPI implementation.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This commit is contained in:
Andrew Boie 2020-12-09 10:22:57 -08:00 • committed by Andrew Boie
commit d7dc0deae5
1 changed files with 3 additions and 2 deletions
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5
arch/x86/core/x86_mmu.c
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@ -347,8 +347,6 @@ static inline void tlb_flush_page(void *addr)
char *page = (char *)addr;
__asm__ ("invlpg %0" :: "m" (*page));
/* TODO: Need to implement TLB shootdown for SMP */
}
#ifdef CONFIG_X86_KPTI
@ -388,6 +386,9 @@ void z_x86_tlb_ipi(const void *arg)
z_x86_cr3_set(ptables);
}
/* NOTE: This is not synchronous and the actual flush takes place some short
* time after this exits.
*/
static inline void tlb_shootdown(void)
{
z_loapic_ipi(0, LOAPIC_ICR_IPI_OTHERS, CONFIG_TLB_IPI_VECTOR);