clock: update clock sources for RTD 2.0.0
Update clock sources for RTD 2.0.0. Update core clock to 1GHz. Signed-off-by: Ha Duong Quang <ha.duongquang@nxp.com>
This commit is contained in:
parent
e5d4b66b93
commit
d1ab07ba4a
2 changed files with 2 additions and 6 deletions
|
@ -106,7 +106,7 @@ board.
|
|||
System Clock
|
||||
============
|
||||
|
||||
The Cortex-R52 cores are configured to run at 800 MHz.
|
||||
The Cortex-R52 cores are configured to run at 1 GHz.
|
||||
|
||||
Serial Port
|
||||
===========
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright 2023 NXP
|
||||
* Copyright 2023-2024 NXP
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
@ -292,9 +292,5 @@
|
|||
#define NXP_S32_SPI9_CLK 284U
|
||||
#define NXP_S32_SRX0_CLK 285U
|
||||
#define NXP_S32_SRX1_CLK 286U
|
||||
#define NXP_S32_CORE_PLL_REFCLKOUT 287U
|
||||
#define NXP_S32_CORE_PLL_FBCLKOUT 288U
|
||||
#define NXP_S32_PERIPH_PLL_REFCLKOUT 289U
|
||||
#define NXP_S32_PERIPH_PLL_FBCLKOUT 290U
|
||||
|
||||
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_NXP_S32Z2_CLOCK_H_ */
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue