diff --git a/boards/nxp/s32z2xxdc2/doc/index.rst b/boards/nxp/s32z2xxdc2/doc/index.rst
index 18660e2fee5..889e5dedcd6 100644
--- a/boards/nxp/s32z2xxdc2/doc/index.rst
+++ b/boards/nxp/s32z2xxdc2/doc/index.rst
@@ -106,7 +106,7 @@ board.
 System Clock
 ============
 
-The Cortex-R52 cores are configured to run at 800 MHz.
+The Cortex-R52 cores are configured to run at 1 GHz.
 
 Serial Port
 ===========
diff --git a/include/zephyr/dt-bindings/clock/nxp_s32z2_clock.h b/include/zephyr/dt-bindings/clock/nxp_s32z2_clock.h
index 6471a2c5406..b19e44ef42d 100644
--- a/include/zephyr/dt-bindings/clock/nxp_s32z2_clock.h
+++ b/include/zephyr/dt-bindings/clock/nxp_s32z2_clock.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2023 NXP
+ * Copyright 2023-2024 NXP
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -292,9 +292,5 @@
 #define NXP_S32_SPI9_CLK                           284U
 #define NXP_S32_SRX0_CLK                           285U
 #define NXP_S32_SRX1_CLK                           286U
-#define NXP_S32_CORE_PLL_REFCLKOUT                 287U
-#define NXP_S32_CORE_PLL_FBCLKOUT                  288U
-#define NXP_S32_PERIPH_PLL_REFCLKOUT               289U
-#define NXP_S32_PERIPH_PLL_FBCLKOUT                290U
 
 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_NXP_S32Z2_CLOCK_H_ */