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arm: cortex-m: add an option to trap unaligned access

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Cortex-M mainline cores have an option to generate a fault on word and
halfword unaligned access [1], this patch adds a Kconfig option for
enabling the feature.

[1] https://developer.arm.com/documentation/dui0552/a/cortex-m3-peripherals/system-control-block/configuration-and-control-register

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This commit is contained in:
Fabio Baltieri 2022-03-09 10:29:56 +00:00 • committed by Anas Nashif
commit cfa0205c6f
2 changed files with 10 additions and 0 deletions
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7
arch/arm/core/aarch32/cortex_m/Kconfig
View file

@ -339,6 +339,13 @@ config CORTEX_M_DWT
config TEST_EXTRA_STACK_SIZE
default 512 if TEST_ARM_CORTEX_M && FPU_SHARING
config TRAP_UNALIGNED_ACCESS
bool "Unaligned access trap"
depends on !ARMV6_M_ARMV8_M_BASELINE
help
If enabled, the CPU generates a UsageFault exception when executing a
halfword or word access.
endmenu
# Implement the null pointer detection using either the Data Watchpoint and

3
arch/arm/core/aarch32/cortex_m/fault.c
View file

@ -1082,4 +1082,7 @@ void z_arm_fault_init(void)
*/
SCB->CCR |= SCB_CCR_STKOFHFNMIGN_Msk;
#endif /* CONFIG_BUILTIN_STACK_GUARD */
#ifdef CONFIG_TRAP_UNALIGNED_ACCESS
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
#endif /* CONFIG_TRAP_UNALIGNED_ACCESS */
}