From cfa0205c6feff791aae6e4e38ad9ca4dffce8fbd Mon Sep 17 00:00:00 2001 From: Fabio Baltieri Date: Wed, 9 Mar 2022 10:29:56 +0000 Subject: [PATCH] arm: cortex-m: add an option to trap unaligned access Cortex-M mainline cores have an option to generate a fault on word and halfword unaligned access [1], this patch adds a Kconfig option for enabling the feature. [1] https://developer.arm.com/documentation/dui0552/a/cortex-m3-peripherals/system-control-block/configuration-and-control-register Signed-off-by: Fabio Baltieri --- arch/arm/core/aarch32/cortex_m/Kconfig | 7 +++++++ arch/arm/core/aarch32/cortex_m/fault.c | 3 +++ 2 files changed, 10 insertions(+) diff --git a/arch/arm/core/aarch32/cortex_m/Kconfig b/arch/arm/core/aarch32/cortex_m/Kconfig index 4ffad96cc32..12fe46b1746 100644 --- a/arch/arm/core/aarch32/cortex_m/Kconfig +++ b/arch/arm/core/aarch32/cortex_m/Kconfig @@ -339,6 +339,13 @@ config CORTEX_M_DWT config TEST_EXTRA_STACK_SIZE default 512 if TEST_ARM_CORTEX_M && FPU_SHARING +config TRAP_UNALIGNED_ACCESS + bool "Unaligned access trap" + depends on !ARMV6_M_ARMV8_M_BASELINE + help + If enabled, the CPU generates a UsageFault exception when executing a + halfword or word access. + endmenu # Implement the null pointer detection using either the Data Watchpoint and diff --git a/arch/arm/core/aarch32/cortex_m/fault.c b/arch/arm/core/aarch32/cortex_m/fault.c index 15d1006941c..d07aa0d9ad5 100644 --- a/arch/arm/core/aarch32/cortex_m/fault.c +++ b/arch/arm/core/aarch32/cortex_m/fault.c @@ -1082,4 +1082,7 @@ void z_arm_fault_init(void) */ SCB->CCR |= SCB_CCR_STKOFHFNMIGN_Msk; #endif /* CONFIG_BUILTIN_STACK_GUARD */ +#ifdef CONFIG_TRAP_UNALIGNED_ACCESS + SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; +#endif /* CONFIG_TRAP_UNALIGNED_ACCESS */ }