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soc: riscv32: Move rv32m1 sram memory definitions to dts

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Moves the sram memory definitions from Kconfig to device tree for the
rv32m1 ri5cy and zero-riscy cores.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This commit is contained in:
Maureen Helm 2019-05-06 12:50:48 -05:00 • committed by Anas Nashif
commit cf1be5a3c5
6 changed files with 14 additions and 17 deletions
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5
soc/riscv32/openisa_rv32m1/linker.ld
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@ -15,6 +15,7 @@
#define _LINKER
#define _ASMLANGUAGE
#include <generated_dts_board.h>
#include <autoconf.h>
#include <linker/sections.h>
@ -30,8 +31,8 @@
#define ROM_BASE CONFIG_RISCV32_RV32M1_ROM_BASE_ADDR
#define ROM_SIZE CONFIG_RISCV32_RV32M1_ROM_SIZE
#define RAM_BASE CONFIG_RISCV32_RV32M1_RAM_BASE_ADDR
#define RAM_SIZE CONFIG_RISCV32_RV32M1_RAM_SIZE
#define RAM_BASE DT_SRAM_BASE_ADDRESS
#define RAM_SIZE KB(DT_SRAM_SIZE)
#define VECTOR_BASE CONFIG_RISCV32_RV32M1_VECTOR_BASE_ADDR
#define VECTOR_SIZE CONFIG_RISCV32_RV32M1_VECTOR_SIZE