Convert remaining code to using newly introduced integer sized types
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types. This handles the remaining includes and kernel, plus
touching up various points that we skipped because of include
dependancies. We also convert the PRI printf formatters in the arch
code over to normal formatters.
Jira: ZEP-2051
Change-Id: Iecbb12601a3ee4ea936fd7ddea37788a645b08b0
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala
parent
d9a1e367b2
commit
cc334c7273
132 changed files with 1420 additions and 1429 deletions
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@ -96,7 +96,7 @@ static ALWAYS_INLINE void _do_irq_unlock(void)
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* after the 'cmovzl', the correct results are yielded.
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*/
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static ALWAYS_INLINE unsigned int find_lsb_set(uint32_t op)
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static ALWAYS_INLINE unsigned int find_lsb_set(u32_t op)
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{
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unsigned int bitpos;
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@ -146,7 +146,7 @@ static ALWAYS_INLINE unsigned int find_lsb_set(uint32_t op)
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* after the 'cmovzl', the correct results are yielded.
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*/
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static ALWAYS_INLINE unsigned int find_msb_set(uint32_t op)
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static ALWAYS_INLINE unsigned int find_msb_set(u32_t op)
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{
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unsigned int bitpos;
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@ -180,14 +180,14 @@ static ALWAYS_INLINE unsigned int find_msb_set(uint32_t op)
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* @brief read timestamp register ensuring serialization
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*/
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static inline uint64_t _tsc_read(void)
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static inline u64_t _tsc_read(void)
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{
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union {
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struct {
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uint32_t lo;
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uint32_t hi;
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u32_t lo;
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u32_t hi;
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};
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uint64_t value;
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u64_t value;
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} rv;
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/* rdtsc & cpuid clobbers eax, ebx, ecx and edx registers */
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@ -217,9 +217,9 @@ static inline uint64_t _tsc_read(void)
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*/
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static ALWAYS_INLINE
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uint32_t _do_read_cpu_timestamp32(void)
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u32_t _do_read_cpu_timestamp32(void)
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{
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uint32_t rv;
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u32_t rv;
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__asm__ volatile("rdtsc" : "=a"(rv) : : "%edx");
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@ -230,7 +230,7 @@ static ALWAYS_INLINE
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/* Implementation of sys_io.h's documented functions */
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static ALWAYS_INLINE
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void sys_out8(uint8_t data, io_port_t port)
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void sys_out8(u8_t data, io_port_t port)
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{
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__asm__ volatile("outb %b0, %w1;\n\t"
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:
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@ -239,9 +239,9 @@ void sys_out8(uint8_t data, io_port_t port)
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static ALWAYS_INLINE
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uint8_t sys_in8(io_port_t port)
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u8_t sys_in8(io_port_t port)
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{
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uint8_t ret;
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u8_t ret;
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__asm__ volatile("inb %w1, %b0;\n\t"
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: "=a"(ret)
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@ -251,7 +251,7 @@ static ALWAYS_INLINE
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static ALWAYS_INLINE
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void sys_out16(uint16_t data, io_port_t port)
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void sys_out16(u16_t data, io_port_t port)
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{
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__asm__ volatile("outw %w0, %w1;\n\t"
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:
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@ -260,9 +260,9 @@ static ALWAYS_INLINE
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static ALWAYS_INLINE
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uint16_t sys_in16(io_port_t port)
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u16_t sys_in16(io_port_t port)
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{
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uint16_t ret;
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u16_t ret;
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__asm__ volatile("inw %w1, %w0;\n\t"
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: "=a"(ret)
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@ -272,7 +272,7 @@ static ALWAYS_INLINE
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static ALWAYS_INLINE
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void sys_out32(uint32_t data, io_port_t port)
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void sys_out32(u32_t data, io_port_t port)
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{
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__asm__ volatile("outl %0, %w1;\n\t"
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:
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@ -281,9 +281,9 @@ static ALWAYS_INLINE
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static ALWAYS_INLINE
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uint32_t sys_in32(io_port_t port)
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u32_t sys_in32(io_port_t port)
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{
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uint32_t ret;
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u32_t ret;
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__asm__ volatile("inl %w1, %0;\n\t"
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: "=a"(ret)
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@ -295,7 +295,7 @@ static ALWAYS_INLINE
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static ALWAYS_INLINE
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void sys_io_set_bit(io_port_t port, unsigned int bit)
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{
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uint32_t reg = 0;
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u32_t reg = 0;
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__asm__ volatile("inl %w1, %0;\n\t"
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"btsl %2, %0;\n\t"
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@ -307,7 +307,7 @@ static ALWAYS_INLINE
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static ALWAYS_INLINE
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void sys_io_clear_bit(io_port_t port, unsigned int bit)
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{
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uint32_t reg = 0;
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u32_t reg = 0;
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__asm__ volatile("inl %w1, %0;\n\t"
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"btrl %2, %0;\n\t"
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@ -319,7 +319,7 @@ static ALWAYS_INLINE
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static ALWAYS_INLINE
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int sys_io_test_bit(io_port_t port, unsigned int bit)
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{
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uint32_t ret;
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u32_t ret;
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__asm__ volatile("inl %w1, %0\n\t"
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"btl %2, %0\n\t"
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@ -352,66 +352,66 @@ static ALWAYS_INLINE
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}
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static ALWAYS_INLINE
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void sys_write8(uint8_t data, mm_reg_t addr)
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void sys_write8(u8_t data, mm_reg_t addr)
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{
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__asm__ volatile("movb %0, %1;\n\t"
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:
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: "q"(data), "m" (*(volatile uint8_t *) addr)
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: "q"(data), "m" (*(volatile u8_t *) addr)
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: "memory");
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}
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static ALWAYS_INLINE
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uint8_t sys_read8(mm_reg_t addr)
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u8_t sys_read8(mm_reg_t addr)
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{
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uint8_t ret;
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u8_t ret;
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__asm__ volatile("movb %1, %0;\n\t"
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: "=q"(ret)
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: "m" (*(volatile uint8_t *) addr)
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: "m" (*(volatile u8_t *) addr)
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: "memory");
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return ret;
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}
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static ALWAYS_INLINE
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void sys_write16(uint16_t data, mm_reg_t addr)
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void sys_write16(u16_t data, mm_reg_t addr)
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{
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__asm__ volatile("movw %0, %1;\n\t"
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:
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: "r"(data), "m" (*(volatile uint16_t *) addr)
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: "r"(data), "m" (*(volatile u16_t *) addr)
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: "memory");
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}
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static ALWAYS_INLINE
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uint16_t sys_read16(mm_reg_t addr)
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u16_t sys_read16(mm_reg_t addr)
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{
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uint16_t ret;
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u16_t ret;
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__asm__ volatile("movw %1, %0;\n\t"
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: "=r"(ret)
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: "m" (*(volatile uint16_t *) addr)
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: "m" (*(volatile u16_t *) addr)
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: "memory");
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return ret;
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}
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static ALWAYS_INLINE
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void sys_write32(uint32_t data, mm_reg_t addr)
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void sys_write32(u32_t data, mm_reg_t addr)
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{
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__asm__ volatile("movl %0, %1;\n\t"
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:
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: "r"(data), "m" (*(volatile uint32_t *) addr)
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: "r"(data), "m" (*(volatile u32_t *) addr)
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: "memory");
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}
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static ALWAYS_INLINE
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uint32_t sys_read32(mm_reg_t addr)
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u32_t sys_read32(mm_reg_t addr)
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{
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uint32_t ret;
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u32_t ret;
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__asm__ volatile("movl %1, %0;\n\t"
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: "=r"(ret)
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: "m" (*(volatile uint32_t *) addr)
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: "m" (*(volatile u32_t *) addr)
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: "memory");
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return ret;
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@ -422,7 +422,7 @@ static ALWAYS_INLINE
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void sys_set_bit(mem_addr_t addr, unsigned int bit)
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{
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__asm__ volatile("btsl %1, %0;\n\t"
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: "+m" (*(volatile uint32_t *) (addr))
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: "+m" (*(volatile u32_t *) (addr))
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: "Ir" (bit)
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: "memory");
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}
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@ -431,7 +431,7 @@ static ALWAYS_INLINE
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void sys_clear_bit(mem_addr_t addr, unsigned int bit)
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{
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__asm__ volatile("btrl %1, %0;\n\t"
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: "+m" (*(volatile uint32_t *) (addr))
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: "+m" (*(volatile u32_t *) (addr))
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: "Ir" (bit));
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}
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@ -442,7 +442,7 @@ static ALWAYS_INLINE
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__asm__ volatile("btl %2, %1;\n\t"
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"sbb %0, %0\n\t"
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: "=r" (ret), "+m" (*(volatile uint32_t *) (addr))
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: "=r" (ret), "+m" (*(volatile u32_t *) (addr))
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: "Ir" (bit));
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return ret;
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@ -455,7 +455,7 @@ static ALWAYS_INLINE
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__asm__ volatile("btsl %2, %1;\n\t"
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"sbb %0, %0\n\t"
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: "=r" (ret), "+m" (*(volatile uint32_t *) (addr))
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: "=r" (ret), "+m" (*(volatile u32_t *) (addr))
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: "Ir" (bit));
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return ret;
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@ -468,7 +468,7 @@ static ALWAYS_INLINE
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__asm__ volatile("btrl %2, %1;\n\t"
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"sbb %0, %0\n\t"
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: "=r" (ret), "+m" (*(volatile uint32_t *) (addr))
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: "=r" (ret), "+m" (*(volatile u32_t *) (addr))
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: "Ir" (bit));
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return ret;
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