drivers: rtc: stm32: New stm32 RTC driver
STM32 RTC driver for the new RTC API. Can't coexist with old COUNTER based RTC Though supported by HW, RTC_ALARM still to be supported by driver Signed-off-by: Kim Bøndergaard <kim.bondergaard@prevas.dk>
This commit is contained in:
Kim Bøndergaard
Fabio Baltieri
parent
6775b263f3
commit
b3c46083fb
5 changed files with 195 additions and 0 deletions
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@ -10,3 +10,4 @@ zephyr_library_sources_ifdef(CONFIG_RTC_EMUL rtc_emul.c)
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zephyr_library_sources_ifdef(CONFIG_RTC_PCF8523 rtc_pcf8523.c)
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zephyr_library_sources_ifdef(CONFIG_RTC_PCF8563 rtc_pcf8563.c)
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zephyr_library_sources_ifdef(CONFIG_RTC_MOTOROLA_MC146818 rtc_mc146818.c)
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zephyr_library_sources_ifdef(CONFIG_RTC_STM32 rtc_ll_stm32.c)
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@ -39,5 +39,6 @@ source "drivers/rtc/Kconfig.emul"
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source "drivers/rtc/Kconfig.pcf8523"
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source "drivers/rtc/Kconfig.pcf8563"
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source "drivers/rtc/Kconfig.mc146818"
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source "drivers/rtc/Kconfig.stm32"
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endif # RTC
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12
drivers/rtc/Kconfig.stm32
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12
drivers/rtc/Kconfig.stm32
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@ -0,0 +1,12 @@
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# Copyright 2023 Prevas A/S
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# SPDX-License-Identifier: Apache-2.0
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config RTC_STM32
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bool "STM32 RTC driver"
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default y if !COUNTER
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depends on DT_HAS_ST_STM32_RTC_ENABLED
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select USE_STM32_LL_RTC
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select USE_STM32_LL_PWR
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select USE_STM32_LL_RCC
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help
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Build RTC driver for STM32 SoCs.
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170
drivers/rtc/rtc_ll_stm32.c
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170
drivers/rtc/rtc_ll_stm32.c
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@ -0,0 +1,170 @@
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/*
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* Copyright (c) 2023 Prevas A/S
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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*/
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#define DT_DRV_COMPAT st_stm32_rtc
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#include <errno.h>
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#include <zephyr/device.h>
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#include <zephyr/kernel.h>
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#include <zephyr/init.h>
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#include <zephyr/devicetree.h>
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#include <zephyr/drivers/rtc.h>
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#include <zephyr/drivers/clock_control/stm32_clock_control.h>
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#include <zephyr/drivers/clock_control.h>
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#include <soc.h>
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#include <stm32_ll_pwr.h>
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#include <stm32_ll_rcc.h>
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#include <stm32_ll_rtc.h>
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#include <stm32_hsem.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(rtc_stm32, CONFIG_RTC_LOG_LEVEL);
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/* Convert calendar start time */
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/* RTC start time: 1st, Jan, 2000 */
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/* struct tm start: 1st, Jan, 1900 */
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#define TM_TO_RTC_OFFSET 100
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struct rtc_stm32_config {
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LL_RTC_InitTypeDef ll_rtc_config;
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const struct stm32_pclken *pclken;
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};
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struct rtc_stm32_data {
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/* Currently empty */
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};
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static int rtc_stm32_init(const struct device *dev)
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{
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const struct device *const clk = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE);
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const struct rtc_stm32_config *cfg = dev->config;
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if (!device_is_ready(clk)) {
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LOG_ERR("clock control device not ready");
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return -ENODEV;
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}
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/* Enable RTC bus clock */
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if (clock_control_on(clk, (clock_control_subsys_t)&cfg->pclken[0]) != 0) {
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LOG_ERR("clock op failed\n");
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return -EIO;
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}
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/* Enable Backup access */
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z_stm32_hsem_lock(CFG_HW_RCC_SEMID, HSEM_LOCK_DEFAULT_RETRY);
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#if defined(PWR_CR_DBP) || defined(PWR_CR1_DBP) || defined(PWR_DBPCR_DBP) || defined(PWR_DBPR_DBP)
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LL_PWR_EnableBkUpAccess();
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#endif /* PWR_CR_DBP || PWR_CR1_DBP || PWR_DBPR_DBP */
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/* Enable RTC clock source */
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if (clock_control_configure(clk, (clock_control_subsys_t)&cfg->pclken[1], NULL) != 0) {
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LOG_ERR("clock configure failed\n");
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return -EIO;
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}
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LL_RCC_EnableRTC();
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z_stm32_hsem_unlock(CFG_HW_RCC_SEMID);
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if (LL_RTC_Init(RTC, ((LL_RTC_InitTypeDef *)&cfg->ll_rtc_config)) != SUCCESS) {
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return -EIO;
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}
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#ifdef RTC_CR_BYPSHAD
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LL_RTC_DisableWriteProtection(RTC);
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LL_RTC_EnableShadowRegBypass(RTC);
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LL_RTC_EnableWriteProtection(RTC);
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#endif /* RTC_CR_BYPSHAD */
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return 0;
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}
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static const struct stm32_pclken rtc_clk[] = STM32_DT_INST_CLOCKS(0);
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static const struct rtc_stm32_config rtc_config = {
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.ll_rtc_config = {
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.HourFormat = LL_RTC_HOURFORMAT_24HOUR,
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#if DT_INST_CLOCKS_CELL(1, bus) == STM32_SRC_LSI
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/* prescaler values for LSI @ 32 KHz */
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.AsynchPrescaler = 0x7F,
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.SynchPrescaler = 0x00F9,
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#else /* DT_INST_CLOCKS_CELL(1, bus) == STM32_SRC_LSE */
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/* prescaler values for LSE @ 32768 Hz */
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.AsynchPrescaler = 0x7F,
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.SynchPrescaler = 0x00FF,
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#endif
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},
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.pclken = rtc_clk,
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};
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static int rtc_stm32_set_time(const struct device *dev, const struct rtc_time *timeptr)
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{
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LOG_INF("Setting clock");
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LL_RTC_DisableWriteProtection(RTC);
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LL_RTC_EnableInitMode(RTC);
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while (!LL_RTC_IsActiveFlag_INIT(RTC)) {
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};
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LL_RTC_DATE_SetYear(RTC, __LL_RTC_CONVERT_BIN2BCD(timeptr->tm_year - TM_TO_RTC_OFFSET));
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LL_RTC_DATE_SetMonth(RTC, __LL_RTC_CONVERT_BIN2BCD(timeptr->tm_mon + 1));
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LL_RTC_DATE_SetDay(RTC, __LL_RTC_CONVERT_BIN2BCD(timeptr->tm_mday));
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LL_RTC_DATE_SetWeekDay(RTC, __LL_RTC_CONVERT_BIN2BCD(timeptr->tm_wday) + 1);
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LL_RTC_TIME_SetHour(RTC, __LL_RTC_CONVERT_BIN2BCD(timeptr->tm_hour));
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LL_RTC_TIME_SetMinute(RTC, __LL_RTC_CONVERT_BIN2BCD(timeptr->tm_min));
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LL_RTC_TIME_SetSecond(RTC, __LL_RTC_CONVERT_BIN2BCD(timeptr->tm_sec));
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LL_RTC_DisableInitMode(RTC);
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LL_RTC_EnableWriteProtection(RTC);
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return 0;
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}
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static int rtc_stm32_get_time(const struct device *dev, struct rtc_time *timeptr)
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{
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ARG_UNUSED(dev);
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uint32_t rtc_date, rtc_time;
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/* Read time and date registers */
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rtc_time = LL_RTC_TIME_Get(RTC);
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rtc_date = LL_RTC_DATE_Get(RTC);
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timeptr->tm_year = TM_TO_RTC_OFFSET + __LL_RTC_CONVERT_BCD2BIN(__LL_RTC_GET_YEAR(rtc_date));
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/* tm_mon allowed values are 0-11 */
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timeptr->tm_mon = __LL_RTC_CONVERT_BCD2BIN(__LL_RTC_GET_MONTH(rtc_date)) - 1;
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timeptr->tm_mday = __LL_RTC_CONVERT_BCD2BIN(__LL_RTC_GET_DAY(rtc_date));
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timeptr->tm_wday = __LL_RTC_CONVERT_BCD2BIN(__LL_RTC_GET_WEEKDAY(rtc_date)) - 1;
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timeptr->tm_hour = __LL_RTC_CONVERT_BCD2BIN(__LL_RTC_GET_HOUR(rtc_time));
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timeptr->tm_min = __LL_RTC_CONVERT_BCD2BIN(__LL_RTC_GET_MINUTE(rtc_time));
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timeptr->tm_sec = __LL_RTC_CONVERT_BCD2BIN(__LL_RTC_GET_SECOND(rtc_time));
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timeptr->tm_nsec = LL_RTC_TIME_GetSubSecond(RTC);
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return 0;
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}
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struct rtc_driver_api rtc_stm32_driver_api = {
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.set_time = rtc_stm32_set_time,
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.get_time = rtc_stm32_get_time,
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/* RTC_ALARM not supported */
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/* RTC_UPDATE not supported */
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};
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#define RTC_STM32_DEV_CFG(n) \
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static struct rtc_stm32_data rtc_data_##n = {}; \
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\
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DEVICE_DT_INST_DEFINE(n, &rtc_stm32_init, NULL, &rtc_data_##n, &rtc_config, POST_KERNEL, \
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CONFIG_RTC_INIT_PRIORITY, &rtc_stm32_driver_api);
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DT_INST_FOREACH_STATUS_OKAY(RTC_STM32_DEV_CFG);
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11
tests/drivers/rtc/rtc_api/boards/nucleo_h563zi.overlay
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11
tests/drivers/rtc/rtc_api/boards/nucleo_h563zi.overlay
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@ -0,0 +1,11 @@
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/*
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* Copyright (c) 2023 Prevas A/S
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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aliases {
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rtc = &rtc;
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};
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};
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