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xtensa: intel_s1000: enable thread local storage

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Adds the bits to enable thread local storage for
intel_s1000 SoC.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
Daniel Leung 2020-10-05 10:15:00 -07:00 • committed by Andrew Boie
commit c7ed7e492b
2 changed files with 2 additions and 0 deletions
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1
soc/xtensa/intel_s1000/Kconfig.soc
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@ -7,3 +7,4 @@ config SOC_INTEL_S1000
select XTENSA_HAL if "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc" select XTENSA_HAL if "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc"
select HAS_I2C_DW if I2C select HAS_I2C_DW if I2C
select HAS_SPI_DW if SPI select HAS_SPI_DW if SPI
select ARCH_HAS_THREAD_LOCAL_STORAGE

1
soc/xtensa/intel_s1000/linker.ld
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@ -355,6 +355,7 @@ SECTIONS
_etext = .; _etext = .;
} >ram :ram_phdr } >ram :ram_phdr
#include <linker/common-rom.ld> #include <linker/common-rom.ld>
#include <linker/thread-local-storage.ld>
.noinit : ALIGN(4) .noinit : ALIGN(4)
{ {