soc: esp32s3: update APPCPU code
Updates for AMP targets - use common AMP Kconfig - update APPCPU linker script - place AMP common area in the reserved space Signed-off-by: Marek Matej <marek.matej@espressif.com>
This commit is contained in:
parent
322ab2a86e
commit
c69ecabc7a
8 changed files with 50 additions and 103 deletions
|
@ -66,6 +66,8 @@ if(CONFIG_ESP_SIMPLE_BOOT OR CONFIG_MCUBOOT)
|
||||||
|
|
||||||
endif()
|
endif()
|
||||||
|
|
||||||
|
set_property(TARGET bintools PROPERTY disassembly_flag_inline_source)
|
||||||
|
|
||||||
# Select the image origin depending on the boot configuration
|
# Select the image origin depending on the boot configuration
|
||||||
if(CONFIG_SOC_ESP32S3_APPCPU)
|
if(CONFIG_SOC_ESP32S3_APPCPU)
|
||||||
dt_nodelabel(dts_partition_path NODELABEL "slot0_appcpu_partition")
|
dt_nodelabel(dts_partition_path NODELABEL "slot0_appcpu_partition")
|
||||||
|
@ -91,10 +93,10 @@ if(CONFIG_MCUBOOT)
|
||||||
${PYTHON_EXECUTABLE} ${ESP_IDF_PATH}/tools/ci/check_callgraph.py
|
${PYTHON_EXECUTABLE} ${ESP_IDF_PATH}/tools/ci/check_callgraph.py
|
||||||
ARGS
|
ARGS
|
||||||
--rtl-dirs ${CMAKE_BINARY_DIR}/zephyr
|
--rtl-dirs ${CMAKE_BINARY_DIR}/zephyr
|
||||||
--elf-file ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.elf
|
--elf-file ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.elf
|
||||||
find-refs
|
find-refs
|
||||||
--from-section='.iram0.loader_text'
|
--from-section='.iram0.loader_text'
|
||||||
--to-section='.iram0.text'
|
--to-section='.iram0.text'
|
||||||
--exit-code)
|
--exit-code)
|
||||||
endif()
|
endif()
|
||||||
|
|
||||||
|
|
|
@ -156,6 +156,4 @@ config MAC_BB_PD
|
||||||
|
|
||||||
endmenu # Cache config
|
endmenu # Cache config
|
||||||
|
|
||||||
rsource "Kconfig.amp"
|
|
||||||
|
|
||||||
endif # SOC_SERIES_ESP32S3
|
endif # SOC_SERIES_ESP32S3
|
||||||
|
|
|
@ -1,31 +0,0 @@
|
||||||
# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
|
|
||||||
# SPDX-License-Identifier: Apache-2.0
|
|
||||||
|
|
||||||
if SOC_SERIES_ESP32S3
|
|
||||||
|
|
||||||
menu "AMP config"
|
|
||||||
|
|
||||||
config ESP32S3_APPCPU_IRAM_SIZE
|
|
||||||
hex "ESP32S3 APPCPU IRAM size"
|
|
||||||
depends on SOC_ESP32S3_PROCPU || SOC_ESP32S3_APPCPU
|
|
||||||
default 0x10000
|
|
||||||
help
|
|
||||||
Defines APPCPU IRAM area size in bytes.
|
|
||||||
|
|
||||||
config ESP32S3_APPCPU_DRAM_SIZE
|
|
||||||
hex "ESP32S3 APPCPU DRAM size"
|
|
||||||
depends on SOC_ESP32S3_PROCPU || SOC_ESP32S3_APPCPU
|
|
||||||
default 0x10000
|
|
||||||
help
|
|
||||||
Defines APPCPU DRAM area size in bytes.
|
|
||||||
|
|
||||||
config SOC_ENABLE_APPCPU
|
|
||||||
bool
|
|
||||||
default y
|
|
||||||
depends on (IPM || MBOX) && SOC_ESP32S3_PROCPU
|
|
||||||
help
|
|
||||||
This hidden configuration lets PROCPU core to map and start APPCPU whenever IPM is enabled.
|
|
||||||
|
|
||||||
endmenu # AMP config
|
|
||||||
|
|
||||||
endif # SOC_SERIES_ESP32S3
|
|
|
@ -11,9 +11,8 @@
|
||||||
#include "memory.h"
|
#include "memory.h"
|
||||||
|
|
||||||
/* User available SRAM memory segments */
|
/* User available SRAM memory segments */
|
||||||
amp_total_size = APPCPU_SRAM_TOTAL_SIZE;
|
procpu_iram_end = USER_IRAM_END - APPCPU_SRAM_SIZE;
|
||||||
procpu_iram_end = USER_IRAM_END - APPCPU_SRAM_TOTAL_SIZE;
|
procpu_dram_end = USER_DRAM_END - APPCPU_SRAM_SIZE;
|
||||||
procpu_dram_end = USER_DRAM_END - APPCPU_SRAM_TOTAL_SIZE;
|
|
||||||
|
|
||||||
procpu_iram_org = SRAM_USER_IRAM_START;
|
procpu_iram_org = SRAM_USER_IRAM_START;
|
||||||
procpu_iram_len = procpu_iram_end - procpu_iram_org;
|
procpu_iram_len = procpu_iram_end - procpu_iram_org;
|
||||||
|
@ -237,7 +236,6 @@ SECTIONS
|
||||||
/* Send .iram0 code to iram */
|
/* Send .iram0 code to iram */
|
||||||
.iram0.vectors : ALIGN(4)
|
.iram0.vectors : ALIGN(4)
|
||||||
{
|
{
|
||||||
_iram_start = ABSOLUTE(.);
|
|
||||||
/* Vectors go to IRAM */
|
/* Vectors go to IRAM */
|
||||||
_init_start = ABSOLUTE(.);
|
_init_start = ABSOLUTE(.);
|
||||||
/* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
|
/* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
|
||||||
|
@ -271,9 +269,9 @@ SECTIONS
|
||||||
*(.entry.text)
|
*(.entry.text)
|
||||||
*(.init.literal)
|
*(.init.literal)
|
||||||
*(.init)
|
*(.init)
|
||||||
|
|
||||||
_init_end = ABSOLUTE(.);
|
_init_end = ABSOLUTE(.);
|
||||||
|
|
||||||
|
_iram_start = ABSOLUTE(.);
|
||||||
} GROUP_DATA_LINK_IN(IRAM_REGION, ROMABLE_REGION)
|
} GROUP_DATA_LINK_IN(IRAM_REGION, ROMABLE_REGION)
|
||||||
|
|
||||||
.iram0.text : ALIGN(4)
|
.iram0.text : ALIGN(4)
|
||||||
|
@ -745,7 +743,7 @@ SECTIONS
|
||||||
} GROUP_LINK_IN(RAMABLE_REGION)
|
} GROUP_LINK_IN(RAMABLE_REGION)
|
||||||
|
|
||||||
/* Provide total SRAM usage, including IRAM and DRAM */
|
/* Provide total SRAM usage, including IRAM and DRAM */
|
||||||
_image_ram_start = _iram_start - IRAM_DRAM_OFFSET;
|
_image_ram_start = _init_start - IRAM_DRAM_OFFSET;
|
||||||
#include <zephyr/linker/ram-end.ld>
|
#include <zephyr/linker/ram-end.ld>
|
||||||
|
|
||||||
ASSERT(((_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), "DRAM segment data does not fit.")
|
ASSERT(((_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), "DRAM segment data does not fit.")
|
||||||
|
|
|
@ -8,6 +8,10 @@
|
||||||
#include <zephyr/linker/linker-defs.h>
|
#include <zephyr/linker/linker-defs.h>
|
||||||
#include <zephyr/linker/linker-tool.h>
|
#include <zephyr/linker/linker-tool.h>
|
||||||
|
|
||||||
|
#if !defined(CONFIG_BOOTLOADER_MCUBOOT)
|
||||||
|
#error "APPCPU image must use MCUboot image format."
|
||||||
|
#endif /* CONFIG_BOOTLOADER_MCUBOOT */
|
||||||
|
|
||||||
#include "memory.h"
|
#include "memory.h"
|
||||||
|
|
||||||
/* User available SRAM memory segments */
|
/* User available SRAM memory segments */
|
||||||
|
@ -47,15 +51,9 @@ appcpu_dram_len = APPCPU_SRAM_SIZE;
|
||||||
|
|
||||||
MEMORY
|
MEMORY
|
||||||
{
|
{
|
||||||
#ifdef CONFIG_BOOTLOADER_MCUBOOT
|
|
||||||
mcuboot_hdr (R): org = 0x0, len = 0x20
|
mcuboot_hdr (R): org = 0x0, len = 0x20
|
||||||
metadata (R): org = 0x20, len = 0x20
|
metadata (R): org = 0x20, len = 0x20
|
||||||
FLASH (R): org = 0x40, len = FLASH_SIZE - 0x40
|
FLASH (R): org = 0x40, len = FLASH_SIZE - 0x40
|
||||||
#else
|
|
||||||
/* Make safety margin in the FLASH memory size so the
|
|
||||||
* (esp_img_header + (n*esp_seg_headers)) would fit */
|
|
||||||
FLASH (R): org = 0x0, len = FLASH_SIZE - 0x100
|
|
||||||
#endif /* CONFIG_BOOTLOADER_MCUBOOT */
|
|
||||||
|
|
||||||
iram0_1_seg(RX): org = appcpu_iram_org, len = appcpu_iram_len
|
iram0_1_seg(RX): org = appcpu_iram_org, len = appcpu_iram_len
|
||||||
dram0_1_seg(RW): org = appcpu_dram_org, len = appcpu_dram_len
|
dram0_1_seg(RW): org = appcpu_dram_org, len = appcpu_dram_len
|
||||||
|
@ -73,7 +71,6 @@ _heap_sentry = DRAM_RESERVED_START;
|
||||||
|
|
||||||
SECTIONS
|
SECTIONS
|
||||||
{
|
{
|
||||||
#if defined(CONFIG_BOOTLOADER_MCUBOOT)
|
|
||||||
/* Reserve space for MCUboot header in the binary */
|
/* Reserve space for MCUboot header in the binary */
|
||||||
.mcuboot_header :
|
.mcuboot_header :
|
||||||
{
|
{
|
||||||
|
@ -109,20 +106,18 @@ SECTIONS
|
||||||
LONG(LOADADDR(.dram0.data))
|
LONG(LOADADDR(.dram0.data))
|
||||||
LONG(_data_end - _data_start)
|
LONG(_data_end - _data_start)
|
||||||
} > metadata
|
} > metadata
|
||||||
#endif /* CONFIG_BOOTLOADER_MCUBOOT */
|
|
||||||
|
|
||||||
#include <zephyr/linker/rel-sections.ld>
|
#include <zephyr/linker/rel-sections.ld>
|
||||||
|
|
||||||
#ifdef CONFIG_LLEXT
|
#ifdef CONFIG_LLEXT
|
||||||
#include <zephyr/linker/llext-sections.ld>
|
#include <zephyr/linker/llext-sections.ld>
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* --- START OF IRAM --- */
|
/* --- START OF IRAM --- */
|
||||||
|
|
||||||
/* Send .iram0 code to iram */
|
/* Send .iram0 code to iram */
|
||||||
.iram0.vectors : ALIGN(4)
|
.iram0.vectors : ALIGN(4)
|
||||||
{
|
{
|
||||||
_iram_start = ABSOLUTE(.);
|
|
||||||
/* Vectors go to IRAM */
|
/* Vectors go to IRAM */
|
||||||
_init_start = ABSOLUTE(.);
|
_init_start = ABSOLUTE(.);
|
||||||
/* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
|
/* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
|
||||||
|
@ -156,10 +151,9 @@ SECTIONS
|
||||||
*(.entry.text)
|
*(.entry.text)
|
||||||
*(.init.literal)
|
*(.init.literal)
|
||||||
*(.init)
|
*(.init)
|
||||||
. = ALIGN (16);
|
|
||||||
|
|
||||||
_init_end = ABSOLUTE(.);
|
_init_end = ABSOLUTE(.);
|
||||||
|
|
||||||
|
_iram_start = ABSOLUTE(.);
|
||||||
} GROUP_DATA_LINK_IN(IRAM_REGION, ROMABLE_REGION)
|
} GROUP_DATA_LINK_IN(IRAM_REGION, ROMABLE_REGION)
|
||||||
|
|
||||||
.iram0.text : ALIGN(4)
|
.iram0.text : ALIGN(4)
|
||||||
|
@ -290,7 +284,6 @@ SECTIONS
|
||||||
#include <zephyr/linker/kobject-data.ld>
|
#include <zephyr/linker/kobject-data.ld>
|
||||||
#include <zephyr/linker/common-rom/common-rom-logging.ld>
|
#include <zephyr/linker/common-rom/common-rom-logging.ld>
|
||||||
|
|
||||||
/* SECTION_PROLOGUE(_RODATA_SECTION_NAME,,) */
|
|
||||||
.dram0.rodata : ALIGN(4)
|
.dram0.rodata : ALIGN(4)
|
||||||
{
|
{
|
||||||
_rodata_start = ABSOLUTE(.);
|
_rodata_start = ABSOLUTE(.);
|
||||||
|
@ -304,26 +297,26 @@ SECTIONS
|
||||||
|
|
||||||
. = ALIGN(4);
|
. = ALIGN(4);
|
||||||
*(EXCLUDE_FILE (
|
*(EXCLUDE_FILE (
|
||||||
*libarch__xtensa__core.a:*
|
*libarch__xtensa__core.a:*
|
||||||
*libkernel.a:fatal.*
|
*libkernel.a:fatal.*
|
||||||
*libkernel.a:init.*
|
*libkernel.a:init.*
|
||||||
*libzephyr.a:cbprintf_complete*
|
*libzephyr.a:cbprintf_complete*
|
||||||
*libzephyr.a:log_core.*
|
*libzephyr.a:log_core.*
|
||||||
*libzephyr.a:log_backend_uart.*
|
*libzephyr.a:log_backend_uart.*
|
||||||
*libzephyr.a:log_output.*
|
*libzephyr.a:log_output.*
|
||||||
*libzephyr.a:loader.*
|
*libzephyr.a:loader.*
|
||||||
*libdrivers__serial.a:uart_esp32.*) .rodata)
|
*libdrivers__serial.a:uart_esp32.*) .rodata)
|
||||||
|
|
||||||
*(EXCLUDE_FILE (
|
*(EXCLUDE_FILE (
|
||||||
*libarch__xtensa__core.a:*
|
*libarch__xtensa__core.a:*
|
||||||
*libkernel.a:fatal.*
|
*libkernel.a:fatal.*
|
||||||
*libkernel.a:init.*
|
*libkernel.a:init.*
|
||||||
*libzephyr.a:cbprintf_complete*
|
*libzephyr.a:cbprintf_complete*
|
||||||
*libzephyr.a:log_core.*
|
*libzephyr.a:log_core.*
|
||||||
*libzephyr.a:log_backend_uart.*
|
*libzephyr.a:log_backend_uart.*
|
||||||
*libzephyr.a:log_output.*
|
*libzephyr.a:log_output.*
|
||||||
*libzephyr.a:loader.*
|
*libzephyr.a:loader.*
|
||||||
*libdrivers__serial.a:uart_esp32.*) .rodata.*)
|
*libdrivers__serial.a:uart_esp32.*) .rodata.*)
|
||||||
|
|
||||||
. = ALIGN(4);
|
. = ALIGN(4);
|
||||||
|
|
||||||
|
@ -371,10 +364,6 @@ SECTIONS
|
||||||
|
|
||||||
/* Flash segments (rodata and text) should be mapped in virtual address space by providing VMA.
|
/* Flash segments (rodata and text) should be mapped in virtual address space by providing VMA.
|
||||||
* Executing directly from LMA is not possible. */
|
* Executing directly from LMA is not possible. */
|
||||||
#pragma push_macro("GROUP_ROM_LINK_IN")
|
|
||||||
#undef GROUP_ROM_LINK_IN
|
|
||||||
#define GROUP_ROM_LINK_IN(vregion, lregion) > RAMABLE_REGION AT > lregion
|
|
||||||
|
|
||||||
#include <zephyr/linker/cplusplus-rom.ld>
|
#include <zephyr/linker/cplusplus-rom.ld>
|
||||||
#include <zephyr/linker/common-rom/common-rom-init.ld>
|
#include <zephyr/linker/common-rom/common-rom-init.ld>
|
||||||
#include <zephyr/linker/common-rom/common-rom-kernel-devices.ld>
|
#include <zephyr/linker/common-rom/common-rom-kernel-devices.ld>
|
||||||
|
@ -386,18 +375,14 @@ SECTIONS
|
||||||
#include <zephyr/linker/thread-local-storage.ld>
|
#include <zephyr/linker/thread-local-storage.ld>
|
||||||
#include <snippets-sections.ld>
|
#include <snippets-sections.ld>
|
||||||
|
|
||||||
#pragma pop_macro("GROUP_ROM_LINK_IN")
|
|
||||||
|
|
||||||
/* Create an explicit section at the end of all the data that shall be mapped into drom.
|
/* Create an explicit section at the end of all the data that shall be mapped into drom.
|
||||||
* This is used to calculate the size of the _image_drom_size variable */
|
* This is used to calculate the size of the _image_drom_size variable */
|
||||||
/* SECTION_PROLOGUE(_RODATA_SECTION_END,,) */
|
.dram0.rodata_end : ALIGN(16)
|
||||||
.dram0.rodata_end : ALIGN(0x10)
|
|
||||||
{
|
{
|
||||||
. = ALIGN(16);
|
. = ALIGN(16);
|
||||||
_image_rodata_end = ABSOLUTE(.);
|
_image_rodata_end = ABSOLUTE(.);
|
||||||
} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
|
} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)
|
||||||
|
|
||||||
|
|
||||||
.dram0.end :
|
.dram0.end :
|
||||||
{
|
{
|
||||||
__data_end = ABSOLUTE(.);
|
__data_end = ABSOLUTE(.);
|
||||||
|
@ -438,19 +423,13 @@ SECTIONS
|
||||||
} GROUP_LINK_IN(RAMABLE_REGION)
|
} GROUP_LINK_IN(RAMABLE_REGION)
|
||||||
|
|
||||||
/* Provide total SRAM usage, including IRAM and DRAM */
|
/* Provide total SRAM usage, including IRAM and DRAM */
|
||||||
_image_ram_start = _iram_start - IRAM_DRAM_OFFSET;
|
_image_ram_start = _init_start - IRAM_DRAM_OFFSET;
|
||||||
#include <zephyr/linker/ram-end.ld>
|
#include <zephyr/linker/ram-end.ld>
|
||||||
|
|
||||||
ASSERT(((__bss_end - ORIGIN(dram0_1_seg)) <= LENGTH(dram0_1_seg)), "DRAM segment data does not fit.")
|
ASSERT(((__bss_end - ORIGIN(dram0_1_seg)) <= LENGTH(dram0_1_seg)), "DRAM segment data does not fit.")
|
||||||
|
|
||||||
/* --- END OF DRAM --- */
|
/* --- END OF DRAM --- */
|
||||||
|
|
||||||
/* --- START OF IROM --- */
|
|
||||||
/* --- END OF IROM --- */
|
|
||||||
|
|
||||||
/* --- START OF DROM --- */
|
|
||||||
/* --- END OF DROM --- */
|
|
||||||
|
|
||||||
#ifdef CONFIG_GEN_ISR_TABLES
|
#ifdef CONFIG_GEN_ISR_TABLES
|
||||||
#include <zephyr/linker/intlist.ld>
|
#include <zephyr/linker/intlist.ld>
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -18,6 +18,7 @@
|
||||||
#include "esp_mcuboot_image.h"
|
#include "esp_mcuboot_image.h"
|
||||||
#include "esp_memory_utils.h"
|
#include "esp_memory_utils.h"
|
||||||
|
|
||||||
|
/* AMP support */
|
||||||
#ifdef CONFIG_SOC_ENABLE_APPCPU
|
#ifdef CONFIG_SOC_ENABLE_APPCPU
|
||||||
|
|
||||||
#include "bootloader_flash_priv.h"
|
#include "bootloader_flash_priv.h"
|
||||||
|
@ -66,7 +67,6 @@ int IRAM_ATTR esp_appcpu_image_load(unsigned int hdr_offset, unsigned int *entry
|
||||||
const uint32_t img_off = FIXED_PARTITION_OFFSET(slot0_appcpu_partition);
|
const uint32_t img_off = FIXED_PARTITION_OFFSET(slot0_appcpu_partition);
|
||||||
const uint32_t fa_size = FIXED_PARTITION_SIZE(slot0_appcpu_partition);
|
const uint32_t fa_size = FIXED_PARTITION_SIZE(slot0_appcpu_partition);
|
||||||
const uint8_t fa_id = FIXED_PARTITION_ID(slot0_appcpu_partition);
|
const uint8_t fa_id = FIXED_PARTITION_ID(slot0_appcpu_partition);
|
||||||
int rc = 0;
|
|
||||||
|
|
||||||
if (entry_addr == NULL) {
|
if (entry_addr == NULL) {
|
||||||
ets_printf("Can't return the entry address. Aborting!\n");
|
ets_printf("Can't return the entry address. Aborting!\n");
|
||||||
|
@ -74,9 +74,6 @@ int IRAM_ATTR esp_appcpu_image_load(unsigned int hdr_offset, unsigned int *entry
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
|
|
||||||
ets_printf("Loading appcpu image, area id: %d, offset: 0x%x, hdr.off: 0x%x, size: %d kB\n",
|
|
||||||
fa_id, img_off, hdr_offset, fa_size / 1024);
|
|
||||||
|
|
||||||
uint32_t mcuboot_header[8] = {0};
|
uint32_t mcuboot_header[8] = {0};
|
||||||
esp_image_load_header_t image_header = {0};
|
esp_image_load_header_t image_header = {0};
|
||||||
|
|
||||||
|
@ -89,7 +86,8 @@ int IRAM_ATTR esp_appcpu_image_load(unsigned int hdr_offset, unsigned int *entry
|
||||||
sys_munmap(data);
|
sys_munmap(data);
|
||||||
|
|
||||||
if (image_header.header_magic == ESP_LOAD_HEADER_MAGIC) {
|
if (image_header.header_magic == ESP_LOAD_HEADER_MAGIC) {
|
||||||
ets_printf("MCUboot image format\n");
|
ets_printf("APPCPU image, area id: %d, offset: 0x%x, hdr.off: 0x%x, size: %d kB\n",
|
||||||
|
fa_id, img_off, hdr_offset, fa_size / 1024);
|
||||||
} else if ((image_header.header_magic & 0xff) == 0xE9) {
|
} else if ((image_header.header_magic & 0xff) == 0xE9) {
|
||||||
ets_printf("ESP image format is not supported\n");
|
ets_printf("ESP image format is not supported\n");
|
||||||
abort();
|
abort();
|
||||||
|
@ -130,13 +128,13 @@ int IRAM_ATTR esp_appcpu_image_load(unsigned int hdr_offset, unsigned int *entry
|
||||||
load_segment(img_off + image_header.dram_flash_offset, image_header.dram_size,
|
load_segment(img_off + image_header.dram_flash_offset, image_header.dram_size,
|
||||||
image_header.dram_dest_addr);
|
image_header.dram_dest_addr);
|
||||||
|
|
||||||
ets_printf("Application start=%xh\n", image_header.entry_addr);
|
ets_printf("Application start=%xh\n\n", image_header.entry_addr);
|
||||||
esp_rom_uart_tx_wait_idle(0);
|
esp_rom_uart_tx_wait_idle(0);
|
||||||
|
|
||||||
assert(entry_addr != NULL);
|
assert(entry_addr != NULL);
|
||||||
*entry_addr = image_header.entry_addr;
|
*entry_addr = image_header.entry_addr;
|
||||||
|
|
||||||
return rc;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
void esp_appcpu_image_stop(void)
|
void esp_appcpu_image_stop(void)
|
||||||
|
|
|
@ -68,6 +68,7 @@
|
||||||
* and it should not be overlapped by the user image.
|
* and it should not be overlapped by the user image.
|
||||||
* When there is no 2nd stage bootloader the bootstrapping is done
|
* When there is no 2nd stage bootloader the bootstrapping is done
|
||||||
* by the so-called SIMPLE_BOOT.
|
* by the so-called SIMPLE_BOOT.
|
||||||
|
* NOTE: AMP is supported only if MCUboot is enabled.
|
||||||
*/
|
*/
|
||||||
#ifdef CONFIG_ESP_SIMPLE_BOOT
|
#ifdef CONFIG_ESP_SIMPLE_BOOT
|
||||||
#define USER_DRAM_END BOOTLOADER_USER_DRAM_END
|
#define USER_DRAM_END BOOTLOADER_USER_DRAM_END
|
||||||
|
@ -78,17 +79,19 @@
|
||||||
|
|
||||||
/* AMP */
|
/* AMP */
|
||||||
#if defined(CONFIG_SOC_ENABLE_APPCPU) || defined(CONFIG_SOC_ESP32S3_APPCPU)
|
#if defined(CONFIG_SOC_ENABLE_APPCPU) || defined(CONFIG_SOC_ESP32S3_APPCPU)
|
||||||
#define APPCPU_IRAM_SIZE CONFIG_ESP32S3_APPCPU_IRAM_SIZE
|
#define APPCPU_IRAM_SIZE CONFIG_ESP_APPCPU_IRAM_SIZE
|
||||||
#define APPCPU_DRAM_SIZE CONFIG_ESP32S3_APPCPU_DRAM_SIZE
|
#define APPCPU_DRAM_SIZE CONFIG_ESP_APPCPU_DRAM_SIZE
|
||||||
#define AMP_COMM_SIZE (0x4000 + 0x400)
|
#define AMP_COMM_SIZE DT_REG_SIZE(DT_NODELABEL(ipmmem0)) + DT_REG_SIZE(DT_NODELABEL(shm0)) + \
|
||||||
|
DT_REG_SIZE(DT_NODELABEL(ipm0)) + DT_REG_SIZE(DT_NODELABEL(mbox0))
|
||||||
|
#undef DRAM_RESERVED_START
|
||||||
|
#define DRAM_RESERVED_START 0x3fce5000
|
||||||
#else
|
#else
|
||||||
#define APPCPU_IRAM_SIZE 0
|
#define APPCPU_IRAM_SIZE 0
|
||||||
#define APPCPU_DRAM_SIZE 0
|
#define APPCPU_DRAM_SIZE 0
|
||||||
#define AMP_COMM_SIZE 0
|
#define AMP_COMM_SIZE 0
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#define APPCPU_SRAM_SIZE (APPCPU_IRAM_SIZE + APPCPU_DRAM_SIZE)
|
#define APPCPU_SRAM_SIZE (APPCPU_IRAM_SIZE + APPCPU_DRAM_SIZE)
|
||||||
#define APPCPU_SRAM_TOTAL_SIZE (APPCPU_SRAM_SIZE + AMP_COMM_SIZE)
|
|
||||||
|
|
||||||
/* Flash */
|
/* Flash */
|
||||||
#ifdef CONFIG_FLASH_SIZE
|
#ifdef CONFIG_FLASH_SIZE
|
||||||
|
|
|
@ -176,5 +176,5 @@ void sys_arch_reboot(int type)
|
||||||
|
|
||||||
#if defined(CONFIG_SOC_ENABLE_APPCPU) && !defined(CONFIG_MCUBOOT)
|
#if defined(CONFIG_SOC_ENABLE_APPCPU) && !defined(CONFIG_MCUBOOT)
|
||||||
extern int esp_appcpu_init(void);
|
extern int esp_appcpu_init(void);
|
||||||
SYS_INIT(esp_appcpu_init, POST_KERNEL, 50);
|
SYS_INIT(esp_appcpu_init, POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
|
||||||
#endif
|
#endif
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue