diff --git a/soc/espressif/esp32s3/CMakeLists.txt b/soc/espressif/esp32s3/CMakeLists.txt index 00d26e14df8..844aee7ebc3 100644 --- a/soc/espressif/esp32s3/CMakeLists.txt +++ b/soc/espressif/esp32s3/CMakeLists.txt @@ -66,6 +66,8 @@ if(CONFIG_ESP_SIMPLE_BOOT OR CONFIG_MCUBOOT) endif() +set_property(TARGET bintools PROPERTY disassembly_flag_inline_source) + # Select the image origin depending on the boot configuration if(CONFIG_SOC_ESP32S3_APPCPU) dt_nodelabel(dts_partition_path NODELABEL "slot0_appcpu_partition") @@ -91,10 +93,10 @@ if(CONFIG_MCUBOOT) ${PYTHON_EXECUTABLE} ${ESP_IDF_PATH}/tools/ci/check_callgraph.py ARGS --rtl-dirs ${CMAKE_BINARY_DIR}/zephyr - --elf-file ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.elf + --elf-file ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.elf find-refs - --from-section='.iram0.loader_text' - --to-section='.iram0.text' + --from-section='.iram0.loader_text' + --to-section='.iram0.text' --exit-code) endif() diff --git a/soc/espressif/esp32s3/Kconfig b/soc/espressif/esp32s3/Kconfig index 3e2886edcf6..99ebadeb440 100644 --- a/soc/espressif/esp32s3/Kconfig +++ b/soc/espressif/esp32s3/Kconfig @@ -156,6 +156,4 @@ config MAC_BB_PD endmenu # Cache config -rsource "Kconfig.amp" - endif # SOC_SERIES_ESP32S3 diff --git a/soc/espressif/esp32s3/Kconfig.amp b/soc/espressif/esp32s3/Kconfig.amp deleted file mode 100644 index f6acbbc52a2..00000000000 --- a/soc/espressif/esp32s3/Kconfig.amp +++ /dev/null @@ -1,31 +0,0 @@ -# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd. -# SPDX-License-Identifier: Apache-2.0 - -if SOC_SERIES_ESP32S3 - -menu "AMP config" - -config ESP32S3_APPCPU_IRAM_SIZE - hex "ESP32S3 APPCPU IRAM size" - depends on SOC_ESP32S3_PROCPU || SOC_ESP32S3_APPCPU - default 0x10000 - help - Defines APPCPU IRAM area size in bytes. - -config ESP32S3_APPCPU_DRAM_SIZE - hex "ESP32S3 APPCPU DRAM size" - depends on SOC_ESP32S3_PROCPU || SOC_ESP32S3_APPCPU - default 0x10000 - help - Defines APPCPU DRAM area size in bytes. - -config SOC_ENABLE_APPCPU - bool - default y - depends on (IPM || MBOX) && SOC_ESP32S3_PROCPU - help - This hidden configuration lets PROCPU core to map and start APPCPU whenever IPM is enabled. - -endmenu # AMP config - -endif # SOC_SERIES_ESP32S3 diff --git a/soc/espressif/esp32s3/default.ld b/soc/espressif/esp32s3/default.ld index 0f40119015f..a57a18fb386 100644 --- a/soc/espressif/esp32s3/default.ld +++ b/soc/espressif/esp32s3/default.ld @@ -11,9 +11,8 @@ #include "memory.h" /* User available SRAM memory segments */ -amp_total_size = APPCPU_SRAM_TOTAL_SIZE; -procpu_iram_end = USER_IRAM_END - APPCPU_SRAM_TOTAL_SIZE; -procpu_dram_end = USER_DRAM_END - APPCPU_SRAM_TOTAL_SIZE; +procpu_iram_end = USER_IRAM_END - APPCPU_SRAM_SIZE; +procpu_dram_end = USER_DRAM_END - APPCPU_SRAM_SIZE; procpu_iram_org = SRAM_USER_IRAM_START; procpu_iram_len = procpu_iram_end - procpu_iram_org; @@ -237,7 +236,6 @@ SECTIONS /* Send .iram0 code to iram */ .iram0.vectors : ALIGN(4) { - _iram_start = ABSOLUTE(.); /* Vectors go to IRAM */ _init_start = ABSOLUTE(.); /* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */ @@ -271,9 +269,9 @@ SECTIONS *(.entry.text) *(.init.literal) *(.init) - _init_end = ABSOLUTE(.); + _iram_start = ABSOLUTE(.); } GROUP_DATA_LINK_IN(IRAM_REGION, ROMABLE_REGION) .iram0.text : ALIGN(4) @@ -745,7 +743,7 @@ SECTIONS } GROUP_LINK_IN(RAMABLE_REGION) /* Provide total SRAM usage, including IRAM and DRAM */ - _image_ram_start = _iram_start - IRAM_DRAM_OFFSET; + _image_ram_start = _init_start - IRAM_DRAM_OFFSET; #include ASSERT(((_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), "DRAM segment data does not fit.") diff --git a/soc/espressif/esp32s3/default_appcpu.ld b/soc/espressif/esp32s3/default_appcpu.ld index 58ec051e389..37b648be039 100644 --- a/soc/espressif/esp32s3/default_appcpu.ld +++ b/soc/espressif/esp32s3/default_appcpu.ld @@ -8,6 +8,10 @@ #include #include +#if !defined(CONFIG_BOOTLOADER_MCUBOOT) +#error "APPCPU image must use MCUboot image format." +#endif /* CONFIG_BOOTLOADER_MCUBOOT */ + #include "memory.h" /* User available SRAM memory segments */ @@ -47,15 +51,9 @@ appcpu_dram_len = APPCPU_SRAM_SIZE; MEMORY { -#ifdef CONFIG_BOOTLOADER_MCUBOOT mcuboot_hdr (R): org = 0x0, len = 0x20 metadata (R): org = 0x20, len = 0x20 FLASH (R): org = 0x40, len = FLASH_SIZE - 0x40 -#else - /* Make safety margin in the FLASH memory size so the - * (esp_img_header + (n*esp_seg_headers)) would fit */ - FLASH (R): org = 0x0, len = FLASH_SIZE - 0x100 -#endif /* CONFIG_BOOTLOADER_MCUBOOT */ iram0_1_seg(RX): org = appcpu_iram_org, len = appcpu_iram_len dram0_1_seg(RW): org = appcpu_dram_org, len = appcpu_dram_len @@ -73,7 +71,6 @@ _heap_sentry = DRAM_RESERVED_START; SECTIONS { -#if defined(CONFIG_BOOTLOADER_MCUBOOT) /* Reserve space for MCUboot header in the binary */ .mcuboot_header : { @@ -109,20 +106,18 @@ SECTIONS LONG(LOADADDR(.dram0.data)) LONG(_data_end - _data_start) } > metadata -#endif /* CONFIG_BOOTLOADER_MCUBOOT */ #include - #ifdef CONFIG_LLEXT +#ifdef CONFIG_LLEXT #include - #endif +#endif /* --- START OF IRAM --- */ /* Send .iram0 code to iram */ .iram0.vectors : ALIGN(4) { - _iram_start = ABSOLUTE(.); /* Vectors go to IRAM */ _init_start = ABSOLUTE(.); /* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */ @@ -156,10 +151,9 @@ SECTIONS *(.entry.text) *(.init.literal) *(.init) - . = ALIGN (16); - _init_end = ABSOLUTE(.); + _iram_start = ABSOLUTE(.); } GROUP_DATA_LINK_IN(IRAM_REGION, ROMABLE_REGION) .iram0.text : ALIGN(4) @@ -290,7 +284,6 @@ SECTIONS #include #include - /* SECTION_PROLOGUE(_RODATA_SECTION_NAME,,) */ .dram0.rodata : ALIGN(4) { _rodata_start = ABSOLUTE(.); @@ -304,26 +297,26 @@ SECTIONS . = ALIGN(4); *(EXCLUDE_FILE ( - *libarch__xtensa__core.a:* - *libkernel.a:fatal.* - *libkernel.a:init.* - *libzephyr.a:cbprintf_complete* - *libzephyr.a:log_core.* - *libzephyr.a:log_backend_uart.* - *libzephyr.a:log_output.* - *libzephyr.a:loader.* - *libdrivers__serial.a:uart_esp32.*) .rodata) + *libarch__xtensa__core.a:* + *libkernel.a:fatal.* + *libkernel.a:init.* + *libzephyr.a:cbprintf_complete* + *libzephyr.a:log_core.* + *libzephyr.a:log_backend_uart.* + *libzephyr.a:log_output.* + *libzephyr.a:loader.* + *libdrivers__serial.a:uart_esp32.*) .rodata) *(EXCLUDE_FILE ( - *libarch__xtensa__core.a:* - *libkernel.a:fatal.* - *libkernel.a:init.* - *libzephyr.a:cbprintf_complete* - *libzephyr.a:log_core.* - *libzephyr.a:log_backend_uart.* - *libzephyr.a:log_output.* - *libzephyr.a:loader.* - *libdrivers__serial.a:uart_esp32.*) .rodata.*) + *libarch__xtensa__core.a:* + *libkernel.a:fatal.* + *libkernel.a:init.* + *libzephyr.a:cbprintf_complete* + *libzephyr.a:log_core.* + *libzephyr.a:log_backend_uart.* + *libzephyr.a:log_output.* + *libzephyr.a:loader.* + *libdrivers__serial.a:uart_esp32.*) .rodata.*) . = ALIGN(4); @@ -371,10 +364,6 @@ SECTIONS /* Flash segments (rodata and text) should be mapped in virtual address space by providing VMA. * Executing directly from LMA is not possible. */ - #pragma push_macro("GROUP_ROM_LINK_IN") - #undef GROUP_ROM_LINK_IN - #define GROUP_ROM_LINK_IN(vregion, lregion) > RAMABLE_REGION AT > lregion - #include #include #include @@ -386,18 +375,14 @@ SECTIONS #include #include - #pragma pop_macro("GROUP_ROM_LINK_IN") - /* Create an explicit section at the end of all the data that shall be mapped into drom. * This is used to calculate the size of the _image_drom_size variable */ - /* SECTION_PROLOGUE(_RODATA_SECTION_END,,) */ - .dram0.rodata_end : ALIGN(0x10) + .dram0.rodata_end : ALIGN(16) { . = ALIGN(16); _image_rodata_end = ABSOLUTE(.); } GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION) - .dram0.end : { __data_end = ABSOLUTE(.); @@ -438,19 +423,13 @@ SECTIONS } GROUP_LINK_IN(RAMABLE_REGION) /* Provide total SRAM usage, including IRAM and DRAM */ - _image_ram_start = _iram_start - IRAM_DRAM_OFFSET; + _image_ram_start = _init_start - IRAM_DRAM_OFFSET; #include ASSERT(((__bss_end - ORIGIN(dram0_1_seg)) <= LENGTH(dram0_1_seg)), "DRAM segment data does not fit.") /* --- END OF DRAM --- */ - /* --- START OF IROM --- */ - /* --- END OF IROM --- */ - - /* --- START OF DROM --- */ - /* --- END OF DROM --- */ - #ifdef CONFIG_GEN_ISR_TABLES #include #endif diff --git a/soc/espressif/esp32s3/esp32s3-mp.c b/soc/espressif/esp32s3/esp32s3-mp.c index 8cae6d5e87c..a174db1e23c 100644 --- a/soc/espressif/esp32s3/esp32s3-mp.c +++ b/soc/espressif/esp32s3/esp32s3-mp.c @@ -18,6 +18,7 @@ #include "esp_mcuboot_image.h" #include "esp_memory_utils.h" +/* AMP support */ #ifdef CONFIG_SOC_ENABLE_APPCPU #include "bootloader_flash_priv.h" @@ -66,7 +67,6 @@ int IRAM_ATTR esp_appcpu_image_load(unsigned int hdr_offset, unsigned int *entry const uint32_t img_off = FIXED_PARTITION_OFFSET(slot0_appcpu_partition); const uint32_t fa_size = FIXED_PARTITION_SIZE(slot0_appcpu_partition); const uint8_t fa_id = FIXED_PARTITION_ID(slot0_appcpu_partition); - int rc = 0; if (entry_addr == NULL) { ets_printf("Can't return the entry address. Aborting!\n"); @@ -74,9 +74,6 @@ int IRAM_ATTR esp_appcpu_image_load(unsigned int hdr_offset, unsigned int *entry return -1; } - ets_printf("Loading appcpu image, area id: %d, offset: 0x%x, hdr.off: 0x%x, size: %d kB\n", - fa_id, img_off, hdr_offset, fa_size / 1024); - uint32_t mcuboot_header[8] = {0}; esp_image_load_header_t image_header = {0}; @@ -89,7 +86,8 @@ int IRAM_ATTR esp_appcpu_image_load(unsigned int hdr_offset, unsigned int *entry sys_munmap(data); if (image_header.header_magic == ESP_LOAD_HEADER_MAGIC) { - ets_printf("MCUboot image format\n"); + ets_printf("APPCPU image, area id: %d, offset: 0x%x, hdr.off: 0x%x, size: %d kB\n", + fa_id, img_off, hdr_offset, fa_size / 1024); } else if ((image_header.header_magic & 0xff) == 0xE9) { ets_printf("ESP image format is not supported\n"); abort(); @@ -130,13 +128,13 @@ int IRAM_ATTR esp_appcpu_image_load(unsigned int hdr_offset, unsigned int *entry load_segment(img_off + image_header.dram_flash_offset, image_header.dram_size, image_header.dram_dest_addr); - ets_printf("Application start=%xh\n", image_header.entry_addr); + ets_printf("Application start=%xh\n\n", image_header.entry_addr); esp_rom_uart_tx_wait_idle(0); assert(entry_addr != NULL); *entry_addr = image_header.entry_addr; - return rc; + return 0; } void esp_appcpu_image_stop(void) diff --git a/soc/espressif/esp32s3/memory.h b/soc/espressif/esp32s3/memory.h index b40f395855e..e435abe95a7 100644 --- a/soc/espressif/esp32s3/memory.h +++ b/soc/espressif/esp32s3/memory.h @@ -68,6 +68,7 @@ * and it should not be overlapped by the user image. * When there is no 2nd stage bootloader the bootstrapping is done * by the so-called SIMPLE_BOOT. + * NOTE: AMP is supported only if MCUboot is enabled. */ #ifdef CONFIG_ESP_SIMPLE_BOOT #define USER_DRAM_END BOOTLOADER_USER_DRAM_END @@ -78,17 +79,19 @@ /* AMP */ #if defined(CONFIG_SOC_ENABLE_APPCPU) || defined(CONFIG_SOC_ESP32S3_APPCPU) -#define APPCPU_IRAM_SIZE CONFIG_ESP32S3_APPCPU_IRAM_SIZE -#define APPCPU_DRAM_SIZE CONFIG_ESP32S3_APPCPU_DRAM_SIZE -#define AMP_COMM_SIZE (0x4000 + 0x400) +#define APPCPU_IRAM_SIZE CONFIG_ESP_APPCPU_IRAM_SIZE +#define APPCPU_DRAM_SIZE CONFIG_ESP_APPCPU_DRAM_SIZE +#define AMP_COMM_SIZE DT_REG_SIZE(DT_NODELABEL(ipmmem0)) + DT_REG_SIZE(DT_NODELABEL(shm0)) + \ + DT_REG_SIZE(DT_NODELABEL(ipm0)) + DT_REG_SIZE(DT_NODELABEL(mbox0)) +#undef DRAM_RESERVED_START +#define DRAM_RESERVED_START 0x3fce5000 #else #define APPCPU_IRAM_SIZE 0 #define APPCPU_DRAM_SIZE 0 #define AMP_COMM_SIZE 0 #endif -#define APPCPU_SRAM_SIZE (APPCPU_IRAM_SIZE + APPCPU_DRAM_SIZE) -#define APPCPU_SRAM_TOTAL_SIZE (APPCPU_SRAM_SIZE + AMP_COMM_SIZE) +#define APPCPU_SRAM_SIZE (APPCPU_IRAM_SIZE + APPCPU_DRAM_SIZE) /* Flash */ #ifdef CONFIG_FLASH_SIZE diff --git a/soc/espressif/esp32s3/soc.c b/soc/espressif/esp32s3/soc.c index 2449fd90887..1a7d1c04dd9 100644 --- a/soc/espressif/esp32s3/soc.c +++ b/soc/espressif/esp32s3/soc.c @@ -176,5 +176,5 @@ void sys_arch_reboot(int type) #if defined(CONFIG_SOC_ENABLE_APPCPU) && !defined(CONFIG_MCUBOOT) extern int esp_appcpu_init(void); -SYS_INIT(esp_appcpu_init, POST_KERNEL, 50); +SYS_INIT(esp_appcpu_init, POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT); #endif