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arch: arm: cortex_ar: Use TPIDRURW as a base pointer for TLS

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Replace the TLS base address pointer from TPIDRURO to TPIDRURW.

The difference between them is that TPIDRURO is read-only in user mode
but TPIDRURW isn't. So TPIDRURO is much more suitable for store
the address of _kernel.CPU[n]. For this reason, this commit replaces
the base pointer of the TLS area.

Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
This commit is contained in:
Huifeng Zhang 2023-07-27 16:42:34 +08:00 • committed by Maureen Helm
commit c3b857c434
3 changed files with 11 additions and 3 deletions
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5
arch/arm/core/cortex_a_r/__aeabi_read_tp.S
View file

@ -11,5 +11,8 @@ _ASM_FILE_PROLOGUE
GTEXT(__aeabi_read_tp) GTEXT(__aeabi_read_tp)
SECTION_FUNC(text, __aeabi_read_tp) SECTION_FUNC(text, __aeabi_read_tp)
mrc 15, 0, r0, c13, c0, 3 /*
* TPIDRURW will be used as a base pointer point to TLS aera.
*/
mrc 15, 0, r0, c13, c0, 2
bx lr bx lr

4
arch/arm/core/cortex_a_r/swap_helper.S
View file

@ -121,10 +121,10 @@ out_fp_inactive:
ldr r0, [r4] ldr r0, [r4]
/* Store TLS pointer in the "Process ID" register. /* Store TLS pointer in the "Process ID" register.
* This register is used as a base pointer to all * TPIDRURW is used as a base pointer to all
* thread variables with offsets added by toolchain. * thread variables with offsets added by toolchain.
*/ */
mcr 15, 0, r0, cr13, cr0, 3 mcr 15, 0, r0, c13, c0, 2
#endif #endif
#if defined(CONFIG_ARM_STORE_EXC_RETURN) #if defined(CONFIG_ARM_STORE_EXC_RETURN)

5
cmake/compiler/gcc/target_arm.cmake
View file

@ -34,5 +34,10 @@ if(CONFIG_FP16)
list(APPEND ARM_C_FLAGS -mfp16-format=alternative) list(APPEND ARM_C_FLAGS -mfp16-format=alternative)
endif() endif()
endif() endif()
if(CONFIG_THREAD_LOCAL_STORAGE)
list(APPEND ARM_C_FLAGS -mtp=soft)
endif()
list(APPEND TOOLCHAIN_C_FLAGS ${ARM_C_FLAGS}) list(APPEND TOOLCHAIN_C_FLAGS ${ARM_C_FLAGS})
list(APPEND TOOLCHAIN_LD_FLAGS NO_SPLIT ${ARM_C_FLAGS}) list(APPEND TOOLCHAIN_LD_FLAGS NO_SPLIT ${ARM_C_FLAGS})