arch: arm64: Unify the initialization of MMU and MPU

Because MMU and MPU should not be enabled together and they provide
the same functionalities.

Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>

arch/arm64/core/cortex_r/mpu/arm_mpu.c

@@ -130,11 +130,13 @@ static void region_init(const uint32_t index,
 /*
  * @brief MPU default configuration
  *
- * This function provides the default configuration mechanism for the Memory
+ * This function here provides the default configuration mechanism
- * Protection Unit (MPU).
+ * for the Memory Protection Unit (MPU).
  */
-static int arm_mpu_init(const struct device *arg)
+void z_arm64_mm_init(bool is_primary_core)
 {
+	/* This param is only for compatibility with the MMU init */
+	ARG_UNUSED(is_primary_core);
 	uint64_t val;
 	uint32_t r_index;
 
@@ -148,7 +150,7 @@ static int arm_mpu_init(const struct device *arg)
 	if ((val != ID_AA64MMFR0_PMSA_EN) &&
 	    (val != ID_AA64MMFR0_PMSA_VMSA_EN)) {
 		__ASSERT(0, "MPU not supported!\n");
-		return -1;
+		return;
 	}
 
 	if (mpu_config.num_regions > get_num_regions()) {
@@ -162,7 +164,7 @@ static int arm_mpu_init(const struct device *arg)
 			 "Request to configure: %u regions (supported: %u)\n",
 			 mpu_config.num_regions,
 			 get_num_regions());
-		return -1;
+		return;
 	}
 
 	LOG_DBG("total region count: %d", get_num_regions());
@@ -181,9 +183,4 @@ static int arm_mpu_init(const struct device *arg)
 	static_regions_num = mpu_config.num_regions;
 
 	arm_core_mpu_enable();
-
-	return 0;
 }
-
-SYS_INIT(arm_mpu_init, PRE_KERNEL_1,
-	 CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);

arch/arm64/core/mmu.c

@@ -789,7 +789,7 @@ static sys_slist_t domain_list;
  * This function provides the default configuration mechanism for the Memory
  * Management Unit (MMU).
  */
-void z_arm64_mmu_init(bool is_primary_core)
+void z_arm64_mm_init(bool is_primary_core)
 {
 	unsigned int flags = 0U;
 

arch/arm64/core/prep_c.c

@@ -17,13 +17,11 @@
 #include <kernel_internal.h>
 #include <linker/linker-defs.h>
 
+__weak void z_arm64_mm_init(bool is_primary_core) { }
+
 extern FUNC_NORETURN void z_cstart(void);
 
-#ifdef CONFIG_ARM_MMU
+extern void z_arm64_mm_init(bool is_primary_core);
-extern void z_arm64_mmu_init(bool is_primary_core);
-#else
-static inline void z_arm64_mmu_init(bool is_primary_core) { }
-#endif
 
 static inline void z_arm64_bss_zero(void)
 {
@@ -52,7 +50,7 @@ void z_arm64_prep_c(void)
 #ifdef CONFIG_XIP
 	z_data_copy();
 #endif
-	z_arm64_mmu_init(true);
+	z_arm64_mm_init(true);
 	z_arm64_interrupt_init();
 	z_cstart();
 

arch/arm64/core/smp.c

@@ -51,6 +51,8 @@ static const uint64_t cpu_node_list[] = {
 	DT_FOREACH_CHILD_STATUS_OKAY(DT_PATH(cpus), CPU_REG_ID)
 };
 
+extern void z_arm64_mm_init(bool is_primary_core);
+
 /* Called from Zephyr initialization */
 void arch_start_cpu(int cpu_num, k_thread_stack_t *stack, int sz,
 		    arch_cpustart_t fn, void *arg)
@@ -121,7 +123,7 @@ void z_arm64_secondary_start(void)
 	/* Initialize tpidrro_el0 with our struct _cpu instance address */
 	write_tpidrro_el0((uintptr_t)&_kernel.cpus[cpu_num]);
 
-	z_arm64_mmu_init(false);
+	z_arm64_mm_init(false);
 
 #ifdef CONFIG_SMP
 	arm_gic_secondary_init();

include/arch/arm64/arm_mmu.h

@@ -195,7 +195,6 @@ struct arm_mmu_ptables {
 extern const struct arm_mmu_config mmu_config;
 
 struct k_thread;
-void z_arm64_mmu_init(bool is_primary_core);
 void z_arm64_thread_pt_init(struct k_thread *thread);
 void z_arm64_swap_ptables(struct k_thread *thread);