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soc: stm32g0: add fdcan2

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The STM32G0 soc has 2 CAN controllers. The 2nd on was not working
with zephyr yet as both controllers shares the same IRQ. Recently, the
shared irq system was integrated on now, both can controllers can work
on this chip. Shared interrupts must be enabled only if both can
controllers are enabled.

Signed-off-by: Adrien MARTIN <adrienmar@kickmaker.net>
This commit is contained in:
Adrien MARTIN 2024-01-18 08:48:47 +01:00 • committed by Fabio Baltieri
commit c1ae6e5b4e
2 changed files with 20 additions and 0 deletions
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7
soc/arm/st_stm32/stm32g0/Kconfig.defconfig.stm32g0b1xx
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@ -11,4 +11,11 @@ config SOC
config NUM_IRQS
default 31
if CAN_STM32_FDCAN
config SHARED_INTERRUPTS
default y if $(dt_nodelabel_enabled,fdcan1) && $(dt_nodelabel_enabled,fdcan2)
endif # CAN_STM32_FDCAN
endif # SOC_STM32G0B1XX