michaelh/zephyr
1
0
Fork 0
Code Releases Activity

arm: cortex-m: allow configurable ROM offset

Browse source 
Currently, ARM Cortex-M image ROMs are linked starting at the flash
device's base address (CONFIG_FLASH_BASE_ADDRESS). This prevents XIP
Zephyr applications from being linked to run from elsewhere on the
flash device. Linking Zephyr applications to run from elsewhere can be
necessary when running under a bootloader (i.e., booting into a Zephyr
application from a bootloader, not using Zephyr as a bootloader).

To enable this use case, add a new config option: FLASH_LOAD_OFFSET.
This option directs the linker to treat ROM as if it started that many
bytes from the base of flash on Cortex-M targets. The option defaults
to zero to preserve backwards compatibility.

Change-Id: I64f82aee257c19c2451f9789b0ab56999775b761
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
This commit is contained in:
Marti Bolivar 2017-02-10 11:39:10 -05:00 • committed by Kumar Gala
commit bf2d34ba30
3 changed files with 16 additions and 4 deletions
Download patch file Download diff file Expand all files Collapse all files

11
arch/arm/core/cortex_m/Kconfig
View file

@ -199,6 +199,17 @@ config FLASH_BASE_ADDRESS
This option specifies the base address of the flash on the board. It is This option specifies the base address of the flash on the board. It is
normally set by the board's defconfig file and the user should generally normally set by the board's defconfig file and the user should generally
avoid modifying it via the menu configuration. avoid modifying it via the menu configuration.
config FLASH_LOAD_OFFSET
hex "Kernel load offset"
default 0
help
This option specifies the byte offset from FLASH_BASE_ADDRESS that the
kernel should be loaded into. Changing this value from zero will affect
the Zephyr image's link, and will decrease the total amount of flash
available for use by application code.
If unsure, leave at the default value 0.
endmenu endmenu
menu "ARM Cortex-M0/M0+/M3/M4/M7 options" menu "ARM Cortex-M0/M0+/M3/M4/M7 options"

3
arch/arm/core/cortex_m/prep_c.c
View file

@ -27,7 +27,8 @@
static inline void relocate_vector_table(void) { /* do nothing */ } static inline void relocate_vector_table(void) { /* do nothing */ }
#elif defined(CONFIG_ARMV7_M) #elif defined(CONFIG_ARMV7_M)
#ifdef CONFIG_XIP #ifdef CONFIG_XIP
#define VECTOR_ADDRESS (CONFIG_FLASH_BASE_ADDRESS + CONFIG_TEXT_SECTION_OFFSET) #define VECTOR_ADDRESS ((uintptr_t)&_image_rom_start + \
CONFIG_TEXT_SECTION_OFFSET)
#else #else
#define VECTOR_ADDRESS CONFIG_SRAM_BASE_ADDRESS #define VECTOR_ADDRESS CONFIG_SRAM_BASE_ADDRESS
#endif #endif

6
include/arch/arm/cortex_m/scripts/linker.ld
View file

@ -40,8 +40,8 @@
#define SKIP_TO_KINETIS_FLASH_CONFIG #define SKIP_TO_KINETIS_FLASH_CONFIG
#endif #endif
#define ROM_ADDR CONFIG_FLASH_BASE_ADDRESS #define ROM_ADDR (CONFIG_FLASH_BASE_ADDRESS + CONFIG_FLASH_LOAD_OFFSET)
#define ROM_SIZE CONFIG_FLASH_SIZE*1K #define ROM_SIZE (CONFIG_FLASH_SIZE*1K - CONFIG_FLASH_LOAD_OFFSET)
#if defined(CONFIG_XIP) #if defined(CONFIG_XIP)
#if defined(CONFIG_IS_BOOTLOADER) #if defined(CONFIG_IS_BOOTLOADER)
@ -72,7 +72,7 @@ SECTIONS
{ {
GROUP_START(ROMABLE_REGION) GROUP_START(ROMABLE_REGION)
_image_rom_start = CONFIG_FLASH_BASE_ADDRESS; _image_rom_start = ROM_ADDR;
SECTION_PROLOGUE(_TEXT_SECTION_NAME,,) SECTION_PROLOGUE(_TEXT_SECTION_NAME,,)
{ {