From bf2d34ba30231bd72f5d2e4557edfad0a1189426 Mon Sep 17 00:00:00 2001 From: Marti Bolivar Date: Fri, 10 Feb 2017 11:39:10 -0500 Subject: [PATCH] arm: cortex-m: allow configurable ROM offset Currently, ARM Cortex-M image ROMs are linked starting at the flash device's base address (CONFIG_FLASH_BASE_ADDRESS). This prevents XIP Zephyr applications from being linked to run from elsewhere on the flash device. Linking Zephyr applications to run from elsewhere can be necessary when running under a bootloader (i.e., booting into a Zephyr application from a bootloader, not using Zephyr as a bootloader). To enable this use case, add a new config option: FLASH_LOAD_OFFSET. This option directs the linker to treat ROM as if it started that many bytes from the base of flash on Cortex-M targets. The option defaults to zero to preserve backwards compatibility. Change-Id: I64f82aee257c19c2451f9789b0ab56999775b761 Signed-off-by: Marti Bolivar --- arch/arm/core/cortex_m/Kconfig | 11 +++++++++++ arch/arm/core/cortex_m/prep_c.c | 3 ++- include/arch/arm/cortex_m/scripts/linker.ld | 6 +++--- 3 files changed, 16 insertions(+), 4 deletions(-) diff --git a/arch/arm/core/cortex_m/Kconfig b/arch/arm/core/cortex_m/Kconfig index 3537960c6e9..54e1a74580d 100644 --- a/arch/arm/core/cortex_m/Kconfig +++ b/arch/arm/core/cortex_m/Kconfig @@ -199,6 +199,17 @@ config FLASH_BASE_ADDRESS This option specifies the base address of the flash on the board. It is normally set by the board's defconfig file and the user should generally avoid modifying it via the menu configuration. + +config FLASH_LOAD_OFFSET + hex "Kernel load offset" + default 0 + help + This option specifies the byte offset from FLASH_BASE_ADDRESS that the + kernel should be loaded into. Changing this value from zero will affect + the Zephyr image's link, and will decrease the total amount of flash + available for use by application code. + + If unsure, leave at the default value 0. endmenu menu "ARM Cortex-M0/M0+/M3/M4/M7 options" diff --git a/arch/arm/core/cortex_m/prep_c.c b/arch/arm/core/cortex_m/prep_c.c index 19c31d5063d..ee910cfb358 100644 --- a/arch/arm/core/cortex_m/prep_c.c +++ b/arch/arm/core/cortex_m/prep_c.c @@ -27,7 +27,8 @@ static inline void relocate_vector_table(void) { /* do nothing */ } #elif defined(CONFIG_ARMV7_M) #ifdef CONFIG_XIP -#define VECTOR_ADDRESS (CONFIG_FLASH_BASE_ADDRESS + CONFIG_TEXT_SECTION_OFFSET) +#define VECTOR_ADDRESS ((uintptr_t)&_image_rom_start + \ + CONFIG_TEXT_SECTION_OFFSET) #else #define VECTOR_ADDRESS CONFIG_SRAM_BASE_ADDRESS #endif diff --git a/include/arch/arm/cortex_m/scripts/linker.ld b/include/arch/arm/cortex_m/scripts/linker.ld index 8bfc57adda8..ba35922aa2d 100644 --- a/include/arch/arm/cortex_m/scripts/linker.ld +++ b/include/arch/arm/cortex_m/scripts/linker.ld @@ -40,8 +40,8 @@ #define SKIP_TO_KINETIS_FLASH_CONFIG #endif -#define ROM_ADDR CONFIG_FLASH_BASE_ADDRESS -#define ROM_SIZE CONFIG_FLASH_SIZE*1K +#define ROM_ADDR (CONFIG_FLASH_BASE_ADDRESS + CONFIG_FLASH_LOAD_OFFSET) +#define ROM_SIZE (CONFIG_FLASH_SIZE*1K - CONFIG_FLASH_LOAD_OFFSET) #if defined(CONFIG_XIP) #if defined(CONFIG_IS_BOOTLOADER) @@ -72,7 +72,7 @@ SECTIONS { GROUP_START(ROMABLE_REGION) - _image_rom_start = CONFIG_FLASH_BASE_ADDRESS; + _image_rom_start = ROM_ADDR; SECTION_PROLOGUE(_TEXT_SECTION_NAME,,) {