diff --git a/arch/arm/soc/st_stm32/stm32f0/dts.fixup b/arch/arm/soc/st_stm32/stm32f0/dts.fixup
index b6ad87f1607..e299e26269e 100644
--- a/arch/arm/soc/st_stm32/stm32f0/dts.fixup
+++ b/arch/arm/soc/st_stm32/stm32f0/dts.fixup
@@ -1,6 +1,37 @@
 /* SoC level DTS fixup file */
 
-#define FLASH_DEV_BASE_ADDRESS		ST_STM32F0_FLASH_CONTROLLER_40022000_BASE_ADDRESS_0
-#define FLASH_DEV_NAME			ST_STM32F0_FLASH_CONTROLLER_40022000_LABEL
+#define CONFIG_NUM_IRQ_PRIO_BITS	        ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
+
+#define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS	ST_STM32_USART_40013800_BASE_ADDRESS
+#define CONFIG_UART_STM32_PORT_1_BAUD_RATE	ST_STM32_USART_40013800_CURRENT_SPEED
+#define CONFIG_UART_STM32_PORT_1_IRQ_PRI	ST_STM32_USART_40013800_IRQ_0_PRIORITY
+#define CONFIG_UART_STM32_PORT_1_NAME		ST_STM32_USART_40013800_LABEL
+#define PORT_1_IRQ				ST_STM32_USART_40013800_IRQ_0
+
+#define CONFIG_UART_STM32_PORT_2_BASE_ADDRESS	ST_STM32_USART_40004400_BASE_ADDRESS
+#define CONFIG_UART_STM32_PORT_2_BAUD_RATE	ST_STM32_USART_40004400_CURRENT_SPEED
+#define CONFIG_UART_STM32_PORT_2_IRQ_PRI	ST_STM32_USART_40004400_IRQ_0_PRIORITY
+#define CONFIG_UART_STM32_PORT_2_NAME		ST_STM32_USART_40004400_LABEL
+#define PORT_2_IRQ				ST_STM32_USART_40004400_IRQ_0
+
+#define CONFIG_I2C_1_BASE_ADDRESS		ST_STM32_I2C_V2_40005400_BASE_ADDRESS
+#define CONFIG_I2C_1_COMBINED_IRQ_PRI		ST_STM32_I2C_V2_40005400_IRQ_COMBINED_PRIORITY
+#define CONFIG_I2C_1_NAME			ST_STM32_I2C_V2_40005400_LABEL
+#define CONFIG_I2C_1_COMBINED_IRQ		ST_STM32_I2C_V2_40005400_IRQ_COMBINED
+#define CONFIG_I2C_1_BITRATE			ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
+
+#define CONFIG_I2C_2_BASE_ADDRESS		ST_STM32_I2C_V2_40005800_BASE_ADDRESS
+#define CONFIG_I2C_2_COMBINED_IRQ_PRI		ST_STM32_I2C_V2_40005800_IRQ_COMBINED_PRIORITY
+#define CONFIG_I2C_2_NAME			ST_STM32_I2C_V2_40005800_LABEL
+#define CONFIG_I2C_2_COMBINED_IRQ		ST_STM32_I2C_V2_40005800_IRQ_COMBINED
+#define CONFIG_I2C_2_BITRATE			ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
+
+#define CONFIG_SPI_1_BASE_ADDRESS		ST_STM32_SPI_FIFO_40013000_BASE_ADDRESS
+#define CONFIG_SPI_1_IRQ_PRI			ST_STM32_SPI_FIFO_40013000_IRQ_0_PRIORITY
+#define CONFIG_SPI_1_NAME			ST_STM32_SPI_FIFO_40013000_LABEL
+#define CONFIG_SPI_1_IRQ			ST_STM32_SPI_FIFO_40013000_IRQ_0
+
+#define FLASH_DEV_BASE_ADDRESS		        ST_STM32F0_FLASH_CONTROLLER_40022000_BASE_ADDRESS_0
+#define FLASH_DEV_NAME			        ST_STM32F0_FLASH_CONTROLLER_40022000_LABEL
 
 /* End of SoC Level DTS fixup file */
diff --git a/boards/arm/nucleo_f030r8/dts.fixup b/boards/arm/nucleo_f030r8/dts.fixup
deleted file mode 100644
index 854ddaa28fc..00000000000
--- a/boards/arm/nucleo_f030r8/dts.fixup
+++ /dev/null
@@ -1,26 +0,0 @@
-/* This file is a temporary workaround for mapping of the generated information
- * to the current driver definitions.  This will be removed when the drivers
- * are modified to handle the generated information, or the mapping of
- * generated data matches the driver definitions.
- */
-
-
-#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
-
-#define CONFIG_UART_STM32_PORT_2_BASE_ADDRESS	ST_STM32_USART_40004400_BASE_ADDRESS
-#define CONFIG_UART_STM32_PORT_2_BAUD_RATE	ST_STM32_USART_40004400_CURRENT_SPEED
-#define CONFIG_UART_STM32_PORT_2_IRQ_PRI	ST_STM32_USART_40004400_IRQ_0_PRIORITY
-#define CONFIG_UART_STM32_PORT_2_NAME		ST_STM32_USART_40004400_LABEL
-#define PORT_2_IRQ				ST_STM32_USART_40004400_IRQ_0
-
-#define CONFIG_I2C_1_BASE_ADDRESS		ST_STM32_I2C_V2_40005400_BASE_ADDRESS
-#define CONFIG_I2C_1_COMBINED_IRQ_PRI		ST_STM32_I2C_V2_40005400_IRQ_COMBINED_PRIORITY
-#define CONFIG_I2C_1_NAME			ST_STM32_I2C_V2_40005400_LABEL
-#define CONFIG_I2C_1_COMBINED_IRQ		ST_STM32_I2C_V2_40005400_IRQ_COMBINED
-#define CONFIG_I2C_1_BITRATE			ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
-
-#define CONFIG_I2C_2_BASE_ADDRESS		ST_STM32_I2C_V2_40005800_BASE_ADDRESS
-#define CONFIG_I2C_2_COMBINED_IRQ_PRI		ST_STM32_I2C_V2_40005800_IRQ_COMBINED_PRIORITY
-#define CONFIG_I2C_2_NAME			ST_STM32_I2C_V2_40005800_LABEL
-#define CONFIG_I2C_2_COMBINED_IRQ		ST_STM32_I2C_V2_40005800_IRQ_COMBINED
-#define CONFIG_I2C_2_BITRATE			ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
diff --git a/boards/arm/nucleo_f091rc/dts.fixup b/boards/arm/nucleo_f091rc/dts.fixup
deleted file mode 100644
index 854ddaa28fc..00000000000
--- a/boards/arm/nucleo_f091rc/dts.fixup
+++ /dev/null
@@ -1,26 +0,0 @@
-/* This file is a temporary workaround for mapping of the generated information
- * to the current driver definitions.  This will be removed when the drivers
- * are modified to handle the generated information, or the mapping of
- * generated data matches the driver definitions.
- */
-
-
-#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
-
-#define CONFIG_UART_STM32_PORT_2_BASE_ADDRESS	ST_STM32_USART_40004400_BASE_ADDRESS
-#define CONFIG_UART_STM32_PORT_2_BAUD_RATE	ST_STM32_USART_40004400_CURRENT_SPEED
-#define CONFIG_UART_STM32_PORT_2_IRQ_PRI	ST_STM32_USART_40004400_IRQ_0_PRIORITY
-#define CONFIG_UART_STM32_PORT_2_NAME		ST_STM32_USART_40004400_LABEL
-#define PORT_2_IRQ				ST_STM32_USART_40004400_IRQ_0
-
-#define CONFIG_I2C_1_BASE_ADDRESS		ST_STM32_I2C_V2_40005400_BASE_ADDRESS
-#define CONFIG_I2C_1_COMBINED_IRQ_PRI		ST_STM32_I2C_V2_40005400_IRQ_COMBINED_PRIORITY
-#define CONFIG_I2C_1_NAME			ST_STM32_I2C_V2_40005400_LABEL
-#define CONFIG_I2C_1_COMBINED_IRQ		ST_STM32_I2C_V2_40005400_IRQ_COMBINED
-#define CONFIG_I2C_1_BITRATE			ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
-
-#define CONFIG_I2C_2_BASE_ADDRESS		ST_STM32_I2C_V2_40005800_BASE_ADDRESS
-#define CONFIG_I2C_2_COMBINED_IRQ_PRI		ST_STM32_I2C_V2_40005800_IRQ_COMBINED_PRIORITY
-#define CONFIG_I2C_2_NAME			ST_STM32_I2C_V2_40005800_LABEL
-#define CONFIG_I2C_2_COMBINED_IRQ		ST_STM32_I2C_V2_40005800_IRQ_COMBINED
-#define CONFIG_I2C_2_BITRATE			ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
diff --git a/boards/arm/stm32f072_eval/dts.fixup b/boards/arm/stm32f072_eval/dts.fixup
deleted file mode 100644
index 06daaf9e70a..00000000000
--- a/boards/arm/stm32f072_eval/dts.fixup
+++ /dev/null
@@ -1,14 +0,0 @@
-/* This file is a temporary workaround for mapping of the generated information
- * to the current driver definitions.  This will be removed when the drivers
- * are modified to handle the generated information, or the mapping of
- * generated data matches the driver definitions.
- */
-
-
-#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
-
-#define CONFIG_UART_STM32_PORT_2_BASE_ADDRESS	ST_STM32_USART_40004400_BASE_ADDRESS
-#define CONFIG_UART_STM32_PORT_2_BAUD_RATE	ST_STM32_USART_40004400_CURRENT_SPEED
-#define CONFIG_UART_STM32_PORT_2_IRQ_PRI	ST_STM32_USART_40004400_IRQ_0_PRIORITY
-#define CONFIG_UART_STM32_PORT_2_NAME		ST_STM32_USART_40004400_LABEL
-#define PORT_2_IRQ				ST_STM32_USART_40004400_IRQ_0
diff --git a/boards/arm/stm32f072b_disco/dts.fixup b/boards/arm/stm32f072b_disco/dts.fixup
deleted file mode 100644
index ac9ada6854d..00000000000
--- a/boards/arm/stm32f072b_disco/dts.fixup
+++ /dev/null
@@ -1,31 +0,0 @@
-/* This file is a temporary workaround for mapping of the generated information
- * to the current driver definitions.  This will be removed when the drivers
- * are modified to handle the generated information, or the mapping of
- * generated data matches the driver definitions.
- */
-
-
-#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
-
-#define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS	ST_STM32_USART_40013800_BASE_ADDRESS
-#define CONFIG_UART_STM32_PORT_1_BAUD_RATE	ST_STM32_USART_40013800_CURRENT_SPEED
-#define CONFIG_UART_STM32_PORT_1_IRQ_PRI	ST_STM32_USART_40013800_IRQ_0_PRIORITY
-#define CONFIG_UART_STM32_PORT_1_NAME		ST_STM32_USART_40013800_LABEL
-#define PORT_1_IRQ				ST_STM32_USART_40013800_IRQ_0
-
-#define CONFIG_I2C_1_BASE_ADDRESS		ST_STM32_I2C_V2_40005400_BASE_ADDRESS
-#define CONFIG_I2C_1_COMBINED_IRQ_PRI		ST_STM32_I2C_V2_40005400_IRQ_COMBINED_PRIORITY
-#define CONFIG_I2C_1_NAME			ST_STM32_I2C_V2_40005400_LABEL
-#define CONFIG_I2C_1_COMBINED_IRQ		ST_STM32_I2C_V2_40005400_IRQ_COMBINED
-#define CONFIG_I2C_1_BITRATE			ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
-
-#define CONFIG_I2C_2_BASE_ADDRESS		ST_STM32_I2C_V2_40005800_BASE_ADDRESS
-#define CONFIG_I2C_2_COMBINED_IRQ_PRI		ST_STM32_I2C_V2_40005800_IRQ_COMBINED_PRIORITY
-#define CONFIG_I2C_2_NAME			ST_STM32_I2C_V2_40005800_LABEL
-#define CONFIG_I2C_2_COMBINED_IRQ		ST_STM32_I2C_V2_40005800_IRQ_COMBINED
-#define CONFIG_I2C_2_BITRATE			ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
-
-#define CONFIG_SPI_1_BASE_ADDRESS		ST_STM32_SPI_FIFO_40013000_BASE_ADDRESS
-#define CONFIG_SPI_1_IRQ_PRI			ST_STM32_SPI_FIFO_40013000_IRQ_0_PRIORITY
-#define CONFIG_SPI_1_NAME			ST_STM32_SPI_FIFO_40013000_LABEL
-#define CONFIG_SPI_1_IRQ			ST_STM32_SPI_FIFO_40013000_IRQ_0