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dts: arm: nxp: register ostimer for cm33_cpu0/1

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register ostimer for cm33_cpu0/1
disable systick
set ostimer per sec 1000000 times

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
This commit is contained in:
Lucien Zhao 2025-02-12 16:44:52 +08:00 • committed by Benjamin Cabé
commit ba982a0f85
3 changed files with 33 additions and 1 deletions
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15
dts/arm/nxp/nxp_rt7xx_cm33_cpu0.dtsi
View file

@ -1011,6 +1011,21 @@
interrupts = <55 0>; interrupts = <55 0>;
clocks = <&clkctl4 MCUX_FLEXIO0_CLK>; clocks = <&clkctl4 MCUX_FLEXIO0_CLK>;
}; };
os_timer_cpu0: timers@207000 {
compatible = "nxp,os-timer";
reg = <0x207000 0x1000>;
interrupts = <34 0>;
status = "disabled";
};
};
&systick {
/*
* RT700 cm33_cpu0 relies by default on the OS Timer for system
* clock implementation, so the SysTick node is not to be enabled.
*/
status = "disabled";
}; };
&xspi0 { &xspi0 {

15
dts/arm/nxp/nxp_rt7xx_cm33_cpu1.dtsi
View file

@ -418,8 +418,23 @@
clocks = <&clkctl4 MCUX_LPI2C15_CLK>; clocks = <&clkctl4 MCUX_LPI2C15_CLK>;
status = "disabled"; status = "disabled";
}; };
os_timer_cpu1: timers@209000 {
compatible = "nxp,os-timer";
reg = <0x209000 0x1000>;
interrupts = <30 0>;
status = "disabled";
};
}; };
&nvic { &nvic {
arm,num-irq-priority-bits = <3>; arm,num-irq-priority-bits = <3>;
}; };
&systick {
/*
* RT700 cm33_cpu1 relies by default on the OS Timer for system
* clock implementation, so the SysTick node is not to be enabled.
*/
status = "disabled";
};

4
soc/nxp/imxrt/imxrt7xx/Kconfig.defconfig
View file

@ -1,4 +1,4 @@
# Copyright 2024 NXP # Copyright 2024-2025 NXP
# SPDX-License-Identifier: Apache-2.0 # SPDX-License-Identifier: Apache-2.0
if SOC_MIMXRT798S_CM33_CPU0 if SOC_MIMXRT798S_CM33_CPU0
@ -11,6 +11,7 @@ config NUM_IRQS
config SYS_CLOCK_HW_CYCLES_PER_SEC config SYS_CLOCK_HW_CYCLES_PER_SEC
default 237500000 if CORTEX_M_SYSTICK default 237500000 if CORTEX_M_SYSTICK
default 1000000 if MCUX_OS_TIMER
choice CACHE_TYPE choice CACHE_TYPE
default EXTERNAL_CACHE default EXTERNAL_CACHE
@ -25,6 +26,7 @@ config NUM_IRQS
config SYS_CLOCK_HW_CYCLES_PER_SEC config SYS_CLOCK_HW_CYCLES_PER_SEC
default 100000000 if CORTEX_M_SYSTICK default 100000000 if CORTEX_M_SYSTICK
default 1000000 if MCUX_OS_TIMER
endif # SOC_MIMXRT798S_CM33_CPU1 endif # SOC_MIMXRT798S_CM33_CPU1