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drivers: cavs_timer: Use the new interrupt controller API

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Recent work to this platform added a new, cleaner low level API to the
interrupt controller.  Replace the hand-cooked register access with
that.  This is still not as good as having proper multicore support in
the intc_cavs driver, but it's at least better.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This commit is contained in:
Andy Ross 2021-09-07 09:42:47 -07:00 • committed by Anas Nashif
commit b6a32e9550
1 changed files with 2 additions and 4 deletions
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6
drivers/timer/cavs_timer.c
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@ -7,6 +7,7 @@
#include <drivers/timer/system_timer.h> #include <drivers/timer/system_timer.h>
#include <sys_clock.h> #include <sys_clock.h>
#include <spinlock.h> #include <spinlock.h>
#include <cavs-idc.h>
/** /**
* @file * @file
@ -195,9 +196,6 @@ void smp_timer_init(void)
* FIXME: Done in this way because we don't have an API * FIXME: Done in this way because we don't have an API
* to enable interrupts per CPU. * to enable interrupts per CPU.
*/ */
sys_set_bit(DT_REG_ADDR(DT_NODELABEL(cavs0)) CAVS_INTCTRL[arch_curr_cpu()->id].l2.clear = CAVS_L2_DWCT0;
+ CAVS_ICTL_INT_CPU_OFFSET(arch_curr_cpu()->id)
+ 0x04,
22 + TIMER);
irq_enable(TIMER_IRQ); irq_enable(TIMER_IRQ);
} }