From b6a32e9550467beaf5a1e9f85d16a197b1fc32b6 Mon Sep 17 00:00:00 2001 From: Andy Ross Date: Tue, 7 Sep 2021 09:42:47 -0700 Subject: [PATCH] drivers: cavs_timer: Use the new interrupt controller API Recent work to this platform added a new, cleaner low level API to the interrupt controller. Replace the hand-cooked register access with that. This is still not as good as having proper multicore support in the intc_cavs driver, but it's at least better. Signed-off-by: Andy Ross --- drivers/timer/cavs_timer.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/timer/cavs_timer.c b/drivers/timer/cavs_timer.c index 9d824b4e812..33ea1b7b28c 100644 --- a/drivers/timer/cavs_timer.c +++ b/drivers/timer/cavs_timer.c @@ -7,6 +7,7 @@ #include #include #include +#include /** * @file @@ -195,9 +196,6 @@ void smp_timer_init(void) * FIXME: Done in this way because we don't have an API * to enable interrupts per CPU. */ - sys_set_bit(DT_REG_ADDR(DT_NODELABEL(cavs0)) - + CAVS_ICTL_INT_CPU_OFFSET(arch_curr_cpu()->id) - + 0x04, - 22 + TIMER); + CAVS_INTCTRL[arch_curr_cpu()->id].l2.clear = CAVS_L2_DWCT0; irq_enable(TIMER_IRQ); }