From b4fb833eb9cc0496e6f60d85d2a5522ed8dd8da2 Mon Sep 17 00:00:00 2001 From: Andy Ross Date: Tue, 26 Nov 2024 17:57:30 -0800 Subject: [PATCH] soc/mediatek/adsp: Source timer rate from DTS These devices have an architecturally fixed 13 MHz clock device. But thankfully you can put a default into a DTS binding so we don't have to repeat it for all of them. Signed-off-by: Andy Ross --- dts/bindings/timer/mediatek,ostimer64.yaml | 15 +++++++++++++++ soc/mediatek/mt8xxx/Kconfig.defconfig | 2 +- 2 files changed, 16 insertions(+), 1 deletion(-) create mode 100644 dts/bindings/timer/mediatek,ostimer64.yaml diff --git a/dts/bindings/timer/mediatek,ostimer64.yaml b/dts/bindings/timer/mediatek,ostimer64.yaml new file mode 100644 index 00000000000..6431caef53c --- /dev/null +++ b/dts/bindings/timer/mediatek,ostimer64.yaml @@ -0,0 +1,15 @@ +# Copyright 2024 The ChromiumOS Authors +# SPDX-License-Identifier: Apache-2.0 + +include: base.yaml + +# This clock hardware is almost fully described by its register block, +# but needs a binding for the frequency property below (which is +# architecturally fixed at 13 MHz on all known devices) + +description: MediaTek Audio DSP Core Clock +compatible: "mediatek,ostimer64" +properties: + freq-hz: + type: int + default: 13000000 diff --git a/soc/mediatek/mt8xxx/Kconfig.defconfig b/soc/mediatek/mt8xxx/Kconfig.defconfig index b2796b8889d..86031031044 100644 --- a/soc/mediatek/mt8xxx/Kconfig.defconfig +++ b/soc/mediatek/mt8xxx/Kconfig.defconfig @@ -37,7 +37,7 @@ config XTENSA_TIMER default n config SYS_CLOCK_HW_CYCLES_PER_SEC - default 13000000 + default $(dt_node_int_prop_int,$(dt_nodelabel_path,ostimer64),freq-hz) config MAIN_STACK_SIZE default 2048