boards: mimxrt1xxx: Added support for GPT hardware timer on RT1xxx
Adds support for using GPT as the hardware timer source (as opposed to systick) for all RT1xxx platforms. This requires moving the clock frequency of these devices into a defconfig so it can be overridden by the GPT clock frequency. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit is contained in:
parent
e99eb6bb70
commit
b330f18a39
36 changed files with 126 additions and 36 deletions
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@ -78,6 +78,8 @@ features:
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+-----------+------------+-------------------------------------+
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| ADC | on-chip | adc |
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+-----------+------------+-------------------------------------+
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| GPT | on-chip | gpt |
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+-----------+------------+-------------------------------------+
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The default configuration can be found in the defconfig file:
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``boards/arm/mimxrt1010_evk/mimxrt1010_evk_defconfig``
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@ -120,8 +122,8 @@ The MIMXRT1010 SoC has five pairs of pinmux/gpio controllers.
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System Clock
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============
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The MIMXRT1010 SoC is configured to use the 24 MHz external oscillator on the
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board with the on-chip PLL to generate a 500 MHz core clock.
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The MIMXRT1010 SoC is configured to use the 32 KHz low frequency oscillator on
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the board as a source for the GPT timer to generate a system clock.
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Serial Port
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===========
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@ -83,3 +83,10 @@ zephyr_udc0: &usb1 {
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&edma0 {
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status = "okay";
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};
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/* Enable GPT for use as a hardware timer. This disables Cortex Systick.
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* to use systick, change this node from "gpt_hw_timer" to "systick"
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*/
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&gpt_hw_timer {
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status = "okay";
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};
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@ -9,8 +9,6 @@ CONFIG_SOC_SERIES_IMX_RT=y
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_SERIAL=y
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_GPIO=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=500000000
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CONFIG_ARM_MPU=y
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CONFIG_HW_STACK_PROTECTION=y
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@ -78,6 +78,8 @@ features:
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+-----------+------------+-------------------------------------+
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| ADC | on-chip | ADC |
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+-----------+------------+-------------------------------------+
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| GPT | on-chip | gpt |
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+-----------+------------+-------------------------------------+
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The default configuration can be found in the defconfig file:
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``boards/arm/mimxrt1015_evk/mimxrt1015_evk_defconfig``
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@ -124,8 +126,8 @@ The MIMXRT1015 SoC has five pairs of pinmux/gpio controllers.
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System Clock
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============
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The MIMXRT1015 SoC is configured to use the 24 MHz external oscillator on the
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board with the on-chip PLL to generate a 500 MHz core clock.
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The MIMXRT1015 SoC is configured to use the 32 KHz low frequency oscillator on
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the board as a source for the GPT timer to generate a system clock.
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Serial Port
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===========
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@ -112,3 +112,10 @@ zephyr_udc0: &usb1 {
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&edma0 {
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status = "okay";
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};
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/* Enable GPT for use as a hardware timer. This disables Cortex Systick.
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* to use systick, change this node from "gpt_hw_timer" to "systick"
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*/
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&gpt_hw_timer {
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status = "okay";
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};
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@ -9,8 +9,6 @@ CONFIG_SOC_SERIES_IMX_RT=y
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_SERIAL=y
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_GPIO=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=500000000
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CONFIG_ARM_MPU=y
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CONFIG_HW_STACK_PROTECTION=y
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@ -92,6 +92,8 @@ features:
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+-----------+------------+-------------------------------------+
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| ADC | on-chip | adc |
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+-----------+------------+-------------------------------------+
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| GPT | on-chip | gpt |
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+-----------+------------+-------------------------------------+
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The default configuration can be found in the defconfig file:
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``boards/arm/mimxrt1020_evk/mimxrt1020_evk_defconfig``
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@ -174,8 +176,8 @@ The MIMXRT1020 SoC has five pairs of pinmux/gpio controllers.
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System Clock
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============
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The MIMXRT1020 SoC is configured to use the 24 MHz external oscillator on the
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board with the on-chip PLL to generate a 500 MHz core clock.
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The MIMXRT1020 SoC is configured to use the 32 KHz low frequency oscillator on
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the board as a source for the GPT timer to generate a system clock.
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Serial Port
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===========
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@ -169,3 +169,10 @@ zephyr_udc0: &usb1 {
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&edma0 {
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status = "okay";
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};
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/* Enable GPT for use as a hardware timer. This disables Cortex Systick.
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* to use systick, change this node from "gpt_hw_timer" to "systick"
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*/
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&gpt_hw_timer {
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status = "okay";
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};
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@ -9,8 +9,6 @@ CONFIG_SOC_SERIES_IMX_RT=y
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_SERIAL=y
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_GPIO=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=500000000
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CONFIG_ARM_MPU=y
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CONFIG_HW_STACK_PROTECTION=y
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@ -99,6 +99,8 @@ features:
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+-----------+------------+-------------------------------------+
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| ADC | on-chip | adc |
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+-----------+------------+-------------------------------------+
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| GPT | on-chip | gpt |
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+-----------+------------+-------------------------------------+
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The default configuration can be found in the defconfig file:
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``boards/arm/mimxrt1024_evk/mimxrt1024_evk_defconfig``
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@ -161,8 +163,8 @@ The MIMXRT1024 SoC has five pairs of pinmux/gpio controllers.
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System Clock
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============
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The MIMXRT1024 SoC is configured to use the 24 MHz external oscillator on the
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board with the on-chip PLL to generate a 500 MHz core clock.
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The MIMXRT1024 SoC is configured to use the 32 KHz low frequency oscillator on
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the board as a source for the GPT timer to generate a system clock.
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Serial Port
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===========
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@ -127,3 +127,10 @@
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&adc1 {
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status = "okay";
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};
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/* Enable GPT for use as a hardware timer. This disables Cortex Systick.
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* to use systick, change this node from "gpt_hw_timer" to "systick"
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*/
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&gpt_hw_timer {
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status = "okay";
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};
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@ -9,8 +9,6 @@ CONFIG_SOC_SERIES_IMX_RT=y
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_SERIAL=y
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_GPIO=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=500000000
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CONFIG_ARM_MPU=y
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CONFIG_HW_STACK_PROTECTION=y
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@ -118,6 +118,8 @@ features:
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+-----------+------------+-------------------------------------+
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| ADC | on-chip | adc |
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+-----------+------------+-------------------------------------+
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| GPT | on-chip | gpt |
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+-----------+------------+-------------------------------------+
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The default configuration can be found in the defconfig file:
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@ -255,8 +257,8 @@ The MIMXRT1050 SoC has five pairs of pinmux/gpio controllers.
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System Clock
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============
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The MIMXRT1050 SoC is configured to use the 24 MHz external oscillator on the
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board with the on-chip PLL to generate a 600 MHz core clock.
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The MIMXRT1050 SoC is configured to use the 32 KHz low frequency oscillator on
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the board as a source for the GPT timer to generate a system clock.
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Serial Port
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===========
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@ -232,3 +232,10 @@ zephyr_udc0: &usb1 {
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&edma0 {
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status = "okay";
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};
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/* Enable GPT for use as a hardware timer. This disables Cortex Systick.
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* to use systick, change this node from "gpt_hw_timer" to "systick"
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*/
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&gpt_hw_timer {
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status = "okay";
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};
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@ -10,8 +10,6 @@ CONFIG_BOARD_MIMXRT1050_EVK=y
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_SERIAL=y
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_GPIO=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=600000000
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CONFIG_ARM_MPU=y
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CONFIG_HW_STACK_PROTECTION=y
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@ -10,8 +10,6 @@ CONFIG_BOARD_MIMXRT1050_EVK_QSPI=y
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_SERIAL=y
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_GPIO=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=600000000
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CONFIG_ARM_MPU=y
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CONFIG_HW_STACK_PROTECTION=y
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@ -123,6 +123,8 @@ features:
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+-----------+------------+-------------------------------------+
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| SAI | on-chip | i2s |
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+-----------+------------+-------------------------------------+
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| GPT | on-chip | gpt |
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+-----------+------------+-------------------------------------+
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The default configuration can be found in the defconfig file:
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``boards/arm/mimxrt1060_evk/mimxrt1060_evk_defconfig``
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@ -271,8 +273,8 @@ The MIMXRT1060 SoC has five pairs of pinmux/gpio controllers.
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System Clock
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============
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The MIMXRT1060 SoC is configured to use the 24 MHz external oscillator on the
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board with the on-chip PLL to generate a 600 MHz core clock.
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The MIMXRT1060 SoC is configured to use the 32 KHz low frequency oscillator on
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the board as a source for the GPT timer to generate a system clock.
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Serial Port
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===========
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@ -219,3 +219,10 @@ zephyr_udc0: &usb1 {
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&sai1 {
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status = "okay";
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};
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/* Enable GPT for use as a hardware timer. This disables Cortex Systick.
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* to use systick, change this node from "gpt_hw_timer" to "systick"
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*/
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&gpt_hw_timer {
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status = "okay";
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};
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@ -10,8 +10,6 @@ CONFIG_BOARD_MIMXRT1060_EVK=y
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_SERIAL=y
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_GPIO=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=600000000
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CONFIG_ARM_MPU=y
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CONFIG_HW_STACK_PROTECTION=y
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@ -10,8 +10,6 @@ CONFIG_BOARD_MIMXRT1060_EVK_HYPERFLASH=y
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_SERIAL=y
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_GPIO=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=600000000
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CONFIG_ARM_MPU=y
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CONFIG_HW_STACK_PROTECTION=y
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@ -113,6 +113,8 @@ features:
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+-----------+------------+-------------------------------------+
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| DMA | on-chip | dma |
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+-----------+------------+-------------------------------------+
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| GPT | on-chip | gpt |
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+-----------+------------+-------------------------------------+
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The default configuration can be found in the defconfig file:
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``boards/arm/mimxrt1160_evk/mimxrt1160_evk_cm7_defconfig``
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@ -162,8 +164,8 @@ The MIMXRT1160 SoC has six pairs of pinmux/gpio controllers.
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System Clock
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============
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The MIMXRT1160 SoC is configured to use the 24 MHz external oscillator on the
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board with the on-chip PLL to generate a 600 MHz core clock.
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The MIMXRT1160 SoC is configured to use the 32 KHz low frequency oscillator on
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the board as a source for the GPT timer to generate a system clock.
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Serial Port
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===========
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@ -84,3 +84,10 @@
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};
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};
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};
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/* Enable GPT for use as a hardware timer. This disables Cortex Systick.
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* to use systick, change this node from "gpt_hw_timer" to "systick"
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*/
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&gpt_hw_timer {
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status = "okay";
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};
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@ -96,6 +96,13 @@
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};
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};
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/* Enable GPT for use as a hardware timer. This disables Cortex Systick.
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* to use systick, change this node from "gpt_hw_timer" to "systick"
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*/
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&gpt_hw_timer {
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status = "okay";
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};
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&lpadc0 {
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status = "okay";
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};
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@ -113,6 +113,8 @@ features:
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+-----------+------------+-------------------------------------+
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| DMA | on-chip | dma |
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+-----------+------------+-------------------------------------+
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| GPT | on-chip | gpt |
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+-----------+------------+-------------------------------------+
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The default configuration can be found in the defconfig file:
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``boards/arm/mimxrt1170_evk/mimxrt1170_evk_cm7_defconfig``
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@ -162,8 +164,8 @@ The MIMXRT1170 SoC has six pairs of pinmux/gpio controllers.
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System Clock
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============
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The MIMXRT1170 SoC is configured to use the 24 MHz external oscillator on the
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board with the on-chip PLL to generate a 1 GHz core clock.
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The MIMXRT1170 SoC is configured to use the 32 KHz low frequency oscillator on
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the board as a source for the GPT timer to generate a system clock.
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Serial Port
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===========
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@ -84,3 +84,10 @@
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};
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};
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};
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/* Enable GPT for use as a hardware timer. This disables Cortex Systick.
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* to use systick, change this node from "gpt_hw_timer" to "systick"
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*/
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&gpt_hw_timer {
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status = "okay";
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};
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@ -9,8 +9,6 @@ CONFIG_SOC_SERIES_IMX_RT=y
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_SERIAL=y
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_GPIO=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=400000000
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CONFIG_ARM_MPU=y
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CONFIG_HW_STACK_PROTECTION=y
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&edma0 {
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status = "okay";
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};
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/* Enable GPT for use as a hardware timer. This disables Cortex Systick.
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* to use systick, change this node from "gpt_hw_timer" to "systick"
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*/
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&gpt_hw_timer {
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status = "okay";
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};
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@ -9,9 +9,7 @@ CONFIG_SOC_SERIES_IMX_RT=y
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_SERIAL=y
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_GPIO=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=996000000
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CONFIG_ARM_MPU=y
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CONFIG_HW_STACK_PROTECTION=y
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CONFIG_FLEXSPI_CONFIG_BLOCK_OFFSET=0x400
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@ -30,4 +30,7 @@ config GPIO
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config FLEXSPI_CONFIG_BLOCK_OFFSET
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default 0x400
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 500000000 if CORTEX_M_SYSTICK
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endif # SOC_MIMXRT1010
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@ -23,4 +23,7 @@ config IPG_DIV
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config GPIO
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default y
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 500000000 if CORTEX_M_SYSTICK
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endif # SOC_MIMXRT1015
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@ -23,4 +23,7 @@ config IPG_DIV
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config GPIO
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default y
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 500000000 if CORTEX_M_SYSTICK
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endif # SOC_MIMXRT1021
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@ -23,4 +23,7 @@ config IPG_DIV
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config GPIO
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default y
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 500000000 if CORTEX_M_SYSTICK
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endif # SOC_MIMXRT1024
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@ -23,4 +23,7 @@ config IPG_DIV
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config GPIO
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default y
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 600000000 if CORTEX_M_SYSTICK
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endif # SOC_MIMXRT1052
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@ -23,4 +23,7 @@ config IPG_DIV
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config GPIO
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default y
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 600000000 if CORTEX_M_SYSTICK
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endif # SOC_MIMXRT1062
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@ -14,4 +14,7 @@ config NUM_IRQS
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config GPIO
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default y
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 400000000 if CORTEX_M_SYSTICK
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endif # SOC_MIMXRT1170_CM4
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@ -14,4 +14,7 @@ config NUM_IRQS
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config GPIO
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default y
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 996000000 if CORTEX_M_SYSTICK
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endif # SOC_MIMXRT1176_CM7
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||||
|
|
Loading…
Add table
Add a link
Reference in a new issue