From b2b6b9be7ee85c24f620f9055008891f020ab8d4 Mon Sep 17 00:00:00 2001 From: Georgij Cernysiov Date: Wed, 19 Mar 2025 11:01:38 +0100 Subject: [PATCH] soc: st: h7: m7: remove voltage scale setting The voltage scaling is set during h7 clock initialization. Signed-off-by: Georgij Cernysiov --- soc/st/stm32/stm32h7x/soc_m7.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/soc/st/stm32/stm32h7x/soc_m7.c b/soc/st/stm32/stm32h7x/soc_m7.c index 79715a5f39e..46c9c954e95 100644 --- a/soc/st/stm32/stm32h7x/soc_m7.c +++ b/soc/st/stm32/stm32h7x/soc_m7.c @@ -89,9 +89,6 @@ void soc_early_init_hook(void) #else LL_PWR_ConfigSupply(LL_PWR_LDO_SUPPLY); #endif - LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); - while (LL_PWR_IsActiveFlag_VOS() == 0) { - } /* Errata ES0392 Rev 8: * 2.2.9: Reading from AXI SRAM may lead to data read corruption