sensor: icm45686: Rename REG_SPI_READ_BIT to REG_READ_BIT

So it's generic irrespective to the bus. Tested for I2C and SPI.

Signed-off-by: Luis Ubieda <luisf@croxel.com>
This commit is contained in:
Luis Ubieda 2025-04-15 14:28:08 -04:00 committed by Benjamin Cabé
commit b22299d262
4 changed files with 7 additions and 7 deletions

View file

@ -183,7 +183,7 @@ static inline void icm45686_submit_one_shot(const struct device *dev,
return; return;
} }
uint8_t val = REG_ACCEL_DATA_X1_UI | REG_SPI_READ_BIT; uint8_t val = REG_ACCEL_DATA_X1_UI | REG_READ_BIT;
rtio_sqe_prep_tiny_write(write_sqe, rtio_sqe_prep_tiny_write(write_sqe,
data->rtio.iodev, data->rtio.iodev,

View file

@ -31,7 +31,7 @@ static inline int icm45686_bus_read(const struct device *dev,
return -ENOMEM; return -ENOMEM;
} }
reg = reg | REG_SPI_READ_BIT; reg = reg | REG_READ_BIT;
rtio_sqe_prep_write(write_sqe, iodev, RTIO_PRIO_HIGH, &reg, 1, NULL); rtio_sqe_prep_write(write_sqe, iodev, RTIO_PRIO_HIGH, &reg, 1, NULL);
write_sqe->flags |= RTIO_SQE_TRANSACTION; write_sqe->flags |= RTIO_SQE_TRANSACTION;

View file

@ -13,7 +13,7 @@
#include <zephyr/sys/byteorder.h> #include <zephyr/sys/byteorder.h>
/* Address value has a read bit */ /* Address value has a read bit */
#define REG_SPI_READ_BIT BIT(7) #define REG_READ_BIT BIT(7)
/* Registers */ /* Registers */
/* Register Bank 0 */ /* Register Bank 0 */

View file

@ -188,7 +188,7 @@ static void icm45686_handle_event_actions(struct rtio *ctx,
buf->header.channels = 0x7F; /* Signal all channels are available */ buf->header.channels = 0x7F; /* Signal all channels are available */
buf->header.fifo_count = data->stream.data.fifo_count; buf->header.fifo_count = data->stream.data.fifo_count;
read_reg = REG_FIFO_DATA | REG_SPI_READ_BIT; read_reg = REG_FIFO_DATA | REG_READ_BIT;
rtio_sqe_prep_tiny_write(data_wr_sqe, rtio_sqe_prep_tiny_write(data_wr_sqe,
data->rtio.iodev, data->rtio.iodev,
RTIO_PRIO_HIGH, RTIO_PRIO_HIGH,
@ -253,7 +253,7 @@ static void icm45686_handle_event_actions(struct rtio *ctx,
return; return;
} }
uint8_t read_reg = REG_ACCEL_DATA_X1_UI | REG_SPI_READ_BIT; uint8_t read_reg = REG_ACCEL_DATA_X1_UI | REG_READ_BIT;
rtio_sqe_prep_tiny_write(write_sqe, rtio_sqe_prep_tiny_write(write_sqe,
data->rtio.iodev, data->rtio.iodev,
@ -360,7 +360,7 @@ static void icm45686_event_handler(const struct device *dev)
} }
/** Directly read Status Register to determine what triggered the event */ /** Directly read Status Register to determine what triggered the event */
val = REG_INT1_STATUS0 | REG_SPI_READ_BIT; val = REG_INT1_STATUS0 | REG_READ_BIT;
rtio_sqe_prep_tiny_write(write_sqe, rtio_sqe_prep_tiny_write(write_sqe,
data->rtio.iodev, data->rtio.iodev,
RTIO_PRIO_HIGH, RTIO_PRIO_HIGH,
@ -380,7 +380,7 @@ static void icm45686_event_handler(const struct device *dev)
/** Preemptively read FIFO count so we can decide on the next callback /** Preemptively read FIFO count so we can decide on the next callback
* how much FIFO data we'd read (if needed). * how much FIFO data we'd read (if needed).
*/ */
val = REG_FIFO_COUNT_0 | REG_SPI_READ_BIT; val = REG_FIFO_COUNT_0 | REG_READ_BIT;
rtio_sqe_prep_tiny_write(write_fifo_ct_sqe, rtio_sqe_prep_tiny_write(write_fifo_ct_sqe,
data->rtio.iodev, data->rtio.iodev,
RTIO_PRIO_HIGH, RTIO_PRIO_HIGH,