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soc: espressif: adjust memory organization on linker

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Adjust the memory organization to avoid overlapping
critical regions from bootloaders (MCUboot and IDF)

Signed-off-by: Almir Okato <almir.okato@espressif.com>
This commit is contained in:
Almir Okato 2023-08-13 11:17:54 -03:00 • committed by Carles Cufí
commit af3b04238e
4 changed files with 9 additions and 4 deletions
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4
soc/xtensa/espressif_esp32/esp32s2/default.ld
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@ -18,7 +18,9 @@
#define RAM_IRAM_START 0x40020000
#define RAM_DRAM_START 0x3ffb0000
#define DATA_RAM_END 0x40000000
/* DATA_RAM_END is equivalent 2nd stage bootloader iram_loader_seg
start address (that should not be overlapped) */
#define DATA_RAM_END 0x3FFE0000
#define IRAM_ORG (RAM_IRAM_START + CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE \
+ CONFIG_ESP32S2_DATA_CACHE_SIZE)