boards: arm: stm32l496 disco enables the quadspi NOR

This commit enables the 64Mbit quadspi NOR (mx25r6435)
mounted on the stm32l496g_disco kit.
Use the DMA transfer for QSPI: request 7 on channel3 of DMA2.

Signed-off-by: Francois Ramu <francois.ramu@st.com>

boards/arm/stm32l496g_disco/doc/index.rst

@@ -142,6 +142,8 @@ The Zephyr stm32l496g_disco board configuration supports the following hardware
 +-----------+------------+-------------------------------------+
 | SPI       | on-chip    | spi                                 |
 +-----------+------------+-------------------------------------+
+| QSPI NOR  | on-chip    | off-chip flash                      |
++-----------+------------+-------------------------------------+
 | PWM       | on-chip    | pwm                                 |
 +-----------+------------+-------------------------------------+
 | ADC       | on-chip    | adc                                 |

boards/arm/stm32l496g_disco/stm32l496g_disco.dts

@@ -18,6 +18,7 @@
 		zephyr,shell-uart = &usart2;
 		zephyr,sram = &sram0;
 		zephyr,flash = &flash0;
+		zephyr,flash-controller = &mx25r6435;
 	};
 
 	leds {
@@ -61,6 +62,7 @@
 		sw4 = &joy_left;
 		volt-sensor0 = &vref;
 		volt-sensor1 = &vbat;
+		spi-flash0 = &mx25r6435;
 	};
 
 };
@@ -174,3 +176,30 @@ zephyr_udc0: &usbotg_fs {
 &vbat {
 	status = "okay";
 };
+
+&dma2 {
+	status = "okay";
+};
+
+&quadspi {
+	pinctrl-0 = <&quadspi_bk1_io0_pb1 &quadspi_bk1_io1_pb0
+			&quadspi_bk1_io2_pa7 &quadspi_bk1_io3_pa6
+			&quadspi_bk1_ncs_pb11 &quadspi_clk_pa3>;
+	pinctrl-names = "default";
+
+	dmas = <&dma2 7 3 0x480>; /* channel 7 request 3 on DMA2 */
+	dma-names = "tx_rx";
+
+	flash-id = <1>;
+	status = "okay";
+
+	mx25r6435: qspi-nor-flash@0 {
+		compatible = "st,stm32-qspi-nor";
+		reg = <0>;
+		qspi-max-frequency = <8000000>;
+		size = <DT_SIZE_M(64)>; /* 8 MBytes */
+		status = "okay";
+		spi-bus-width = <4>;
+		writeoc = "PP_1_4_4";
+	};
+};

boards/arm/stm32l496g_disco/stm32l496g_disco.yaml

@@ -17,3 +17,4 @@ supported:
   - counter
   - sdhc
   - adc
+  - qspi