From a13ccdad9ca8e213f47a4bb9b5a67e991a9cae4c Mon Sep 17 00:00:00 2001 From: Francois Ramu Date: Fri, 3 Mar 2023 17:49:14 +0100 Subject: [PATCH] boards: arm: stm32l496 disco enables the quadspi NOR This commit enables the 64Mbit quadspi NOR (mx25r6435) mounted on the stm32l496g_disco kit. Use the DMA transfer for QSPI: request 7 on channel3 of DMA2. Signed-off-by: Francois Ramu --- boards/arm/stm32l496g_disco/doc/index.rst | 2 ++ .../arm/stm32l496g_disco/stm32l496g_disco.dts | 29 +++++++++++++++++++ .../stm32l496g_disco/stm32l496g_disco.yaml | 1 + 3 files changed, 32 insertions(+) diff --git a/boards/arm/stm32l496g_disco/doc/index.rst b/boards/arm/stm32l496g_disco/doc/index.rst index a469a84823c..681969f08af 100644 --- a/boards/arm/stm32l496g_disco/doc/index.rst +++ b/boards/arm/stm32l496g_disco/doc/index.rst @@ -142,6 +142,8 @@ The Zephyr stm32l496g_disco board configuration supports the following hardware +-----------+------------+-------------------------------------+ | SPI | on-chip | spi | +-----------+------------+-------------------------------------+ +| QSPI NOR | on-chip | off-chip flash | ++-----------+------------+-------------------------------------+ | PWM | on-chip | pwm | +-----------+------------+-------------------------------------+ | ADC | on-chip | adc | diff --git a/boards/arm/stm32l496g_disco/stm32l496g_disco.dts b/boards/arm/stm32l496g_disco/stm32l496g_disco.dts index fba2c2a8da0..95453135ee4 100644 --- a/boards/arm/stm32l496g_disco/stm32l496g_disco.dts +++ b/boards/arm/stm32l496g_disco/stm32l496g_disco.dts @@ -18,6 +18,7 @@ zephyr,shell-uart = &usart2; zephyr,sram = &sram0; zephyr,flash = &flash0; + zephyr,flash-controller = &mx25r6435; }; leds { @@ -61,6 +62,7 @@ sw4 = &joy_left; volt-sensor0 = &vref; volt-sensor1 = &vbat; + spi-flash0 = &mx25r6435; }; }; @@ -174,3 +176,30 @@ zephyr_udc0: &usbotg_fs { &vbat { status = "okay"; }; + +&dma2 { + status = "okay"; +}; + +&quadspi { + pinctrl-0 = <&quadspi_bk1_io0_pb1 &quadspi_bk1_io1_pb0 + &quadspi_bk1_io2_pa7 &quadspi_bk1_io3_pa6 + &quadspi_bk1_ncs_pb11 &quadspi_clk_pa3>; + pinctrl-names = "default"; + + dmas = <&dma2 7 3 0x480>; /* channel 7 request 3 on DMA2 */ + dma-names = "tx_rx"; + + flash-id = <1>; + status = "okay"; + + mx25r6435: qspi-nor-flash@0 { + compatible = "st,stm32-qspi-nor"; + reg = <0>; + qspi-max-frequency = <8000000>; + size = ; /* 8 MBytes */ + status = "okay"; + spi-bus-width = <4>; + writeoc = "PP_1_4_4"; + }; +}; diff --git a/boards/arm/stm32l496g_disco/stm32l496g_disco.yaml b/boards/arm/stm32l496g_disco/stm32l496g_disco.yaml index be69f323831..edf64edc3a4 100644 --- a/boards/arm/stm32l496g_disco/stm32l496g_disco.yaml +++ b/boards/arm/stm32l496g_disco/stm32l496g_disco.yaml @@ -17,3 +17,4 @@ supported: - counter - sdhc - adc + - qspi