arch: arm: introduce barriers when disabling interrupts
The ARM Cortex-M 321 application note is stressing that if we disable interrupts by executing CPSID i(f), or by MSR instructions (on PRIMASK, FAULTMASK registers), there is no requirement to add barrier instructions after disabling interupts. However, in ARMv7-M (and ARMv8-M Mainline) we use BASEPRI, instead. Therefore, if we need the effect of disabling interrupts to be recongnized immediately we should add barrier instructions. This commit adds DSB and ISB barriers when disabling interrupt using BASEPRI in the generic arm _irq_lock() function as well as in the PendSV handler, where we need to access kernel globals right after the interrups are disabled. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
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2 changed files with 3 additions and 1 deletions
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@ -61,6 +61,7 @@ SECTION_FUNC(TEXT, __pendsv)
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#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
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movs.n r0, #_EXC_IRQ_DEFAULT_PRIO
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msr BASEPRI, r0
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isb /* Make the effect of disabling interrupts be realized immediately */
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#else
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#error Unknown ARM architecture
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#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
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