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drivers/i2c: stm32: get clock bits/bus from dts files

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Get STM32 I2C clocks bus and bits information from
device tree files.

Fixes #10435

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2018-11-06 15:06:15 +01:00 • committed by Anas Nashif
commit 9df3a1f67f
8 changed files with 48 additions and 9 deletions
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4
soc/arm/st_stm32/stm32f0/dts_fixup.h
View file

@ -19,12 +19,16 @@
#define CONFIG_I2C_1_NAME ST_STM32_I2C_V2_40005400_LABEL
#define CONFIG_I2C_1_COMBINED_IRQ ST_STM32_I2C_V2_40005400_IRQ_COMBINED
#define CONFIG_I2C_1_BITRATE ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
#define CONFIG_I2C_1_CLOCK_BITS ST_STM32_I2C_V2_40005400_CLOCK_BITS
#define CONFIG_I2C_1_CLOCK_BUS ST_STM32_I2C_V2_40005400_CLOCK_BUS
#define CONFIG_I2C_2_BASE_ADDRESS ST_STM32_I2C_V2_40005800_BASE_ADDRESS
#define CONFIG_I2C_2_COMBINED_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_COMBINED_PRIORITY
#define CONFIG_I2C_2_NAME ST_STM32_I2C_V2_40005800_LABEL
#define CONFIG_I2C_2_COMBINED_IRQ ST_STM32_I2C_V2_40005800_IRQ_COMBINED
#define CONFIG_I2C_2_BITRATE ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
#define CONFIG_I2C_2_CLOCK_BITS ST_STM32_I2C_V2_40005800_CLOCK_BITS
#define CONFIG_I2C_2_CLOCK_BUS ST_STM32_I2C_V2_40005800_CLOCK_BUS
#define CONFIG_SPI_1_BASE_ADDRESS ST_STM32_SPI_FIFO_40013000_BASE_ADDRESS
#define CONFIG_SPI_1_IRQ_PRI ST_STM32_SPI_FIFO_40013000_IRQ_0_PRIORITY

4
soc/arm/st_stm32/stm32f1/dts_fixup.h
View file

@ -33,6 +33,8 @@
#define CONFIG_I2C_1_EVENT_IRQ ST_STM32_I2C_V1_40005400_IRQ_EVENT
#define CONFIG_I2C_1_ERROR_IRQ ST_STM32_I2C_V1_40005400_IRQ_ERROR
#define CONFIG_I2C_1_BITRATE ST_STM32_I2C_V1_40005400_CLOCK_FREQUENCY
#define CONFIG_I2C_1_CLOCK_BITS ST_STM32_I2C_V1_40005400_CLOCK_BITS
#define CONFIG_I2C_1_CLOCK_BUS ST_STM32_I2C_V1_40005400_CLOCK_BUS
#define CONFIG_I2C_2_BASE_ADDRESS ST_STM32_I2C_V1_40005800_BASE_ADDRESS
#define CONFIG_I2C_2_EVENT_IRQ_PRI ST_STM32_I2C_V1_40005800_IRQ_EVENT_PRIORITY
@ -41,6 +43,8 @@
#define CONFIG_I2C_2_EVENT_IRQ ST_STM32_I2C_V1_40005800_IRQ_EVENT
#define CONFIG_I2C_2_ERROR_IRQ ST_STM32_I2C_V1_40005800_IRQ_ERROR
#define CONFIG_I2C_2_BITRATE ST_STM32_I2C_V1_40005800_CLOCK_FREQUENCY
#define CONFIG_I2C_2_CLOCK_BITS ST_STM32_I2C_V1_40005800_CLOCK_BITS
#define CONFIG_I2C_2_CLOCK_BUS ST_STM32_I2C_V1_40005800_CLOCK_BUS
#define CONFIG_SPI_1_BASE_ADDRESS ST_STM32_SPI_40013000_BASE_ADDRESS
#define CONFIG_SPI_1_IRQ_PRI ST_STM32_SPI_40013000_IRQ_0_PRIORITY

6
soc/arm/st_stm32/stm32f3/dts_fixup.h
View file

@ -27,6 +27,8 @@
#define CONFIG_I2C_1_EVENT_IRQ ST_STM32_I2C_V2_40005400_IRQ_EVENT
#define CONFIG_I2C_1_ERROR_IRQ ST_STM32_I2C_V2_40005400_IRQ_ERROR
#define CONFIG_I2C_1_BITRATE ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
#define CONFIG_I2C_1_CLOCK_BITS ST_STM32_I2C_V2_40005400_CLOCK_BITS
#define CONFIG_I2C_1_CLOCK_BUS ST_STM32_I2C_V2_40005400_CLOCK_BUS
#define CONFIG_I2C_2_BASE_ADDRESS ST_STM32_I2C_V2_40005800_BASE_ADDRESS
#define CONFIG_I2C_2_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_EVENT_PRIORITY
@ -35,6 +37,8 @@
#define CONFIG_I2C_2_EVENT_IRQ ST_STM32_I2C_V2_40005800_IRQ_EVENT
#define CONFIG_I2C_2_ERROR_IRQ ST_STM32_I2C_V2_40005800_IRQ_ERROR
#define CONFIG_I2C_2_BITRATE ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
#define CONFIG_I2C_2_CLOCK_BITS ST_STM32_I2C_V2_40005800_CLOCK_BITS
#define CONFIG_I2C_2_CLOCK_BUS ST_STM32_I2C_V2_40005800_CLOCK_BUS
#define CONFIG_I2C_3_BASE_ADDRESS ST_STM32_I2C_V2_40007800_BASE_ADDRESS
#define CONFIG_I2C_3_EVENT_IRQ_PRI ST_STM32_I2C_V2_40007800_IRQ_EVENT_PRIORITY
@ -43,6 +47,8 @@
#define CONFIG_I2C_3_EVENT_IRQ ST_STM32_I2C_V2_40007800_IRQ_EVENT
#define CONFIG_I2C_3_ERROR_IRQ ST_STM32_I2C_V2_40007800_IRQ_ERROR
#define CONFIG_I2C_3_BITRATE ST_STM32_I2C_V2_40007800_CLOCK_FREQUENCY
#define CONFIG_I2C_3_CLOCK_BITS ST_STM32_I2C_V2_40007800_CLOCK_BITS
#define CONFIG_I2C_3_CLOCK_BUS ST_STM32_I2C_V2_40007800_CLOCK_BUS
#define CONFIG_SPI_1_BASE_ADDRESS ST_STM32_SPI_FIFO_40013000_BASE_ADDRESS
#define CONFIG_SPI_1_IRQ_PRI ST_STM32_SPI_FIFO_40013000_IRQ_0_PRIORITY

6
soc/arm/st_stm32/stm32f4/dts_fixup.h
View file

@ -33,6 +33,8 @@
#define CONFIG_I2C_1_EVENT_IRQ ST_STM32_I2C_V1_40005400_IRQ_EVENT
#define CONFIG_I2C_1_ERROR_IRQ ST_STM32_I2C_V1_40005400_IRQ_ERROR
#define CONFIG_I2C_1_BITRATE ST_STM32_I2C_V1_40005400_CLOCK_FREQUENCY
#define CONFIG_I2C_1_CLOCK_BITS ST_STM32_I2C_V1_40005400_CLOCK_BITS
#define CONFIG_I2C_1_CLOCK_BUS ST_STM32_I2C_V1_40005400_CLOCK_BUS
#define CONFIG_I2C_2_BASE_ADDRESS ST_STM32_I2C_V1_40005800_BASE_ADDRESS
#define CONFIG_I2C_2_EVENT_IRQ_PRI ST_STM32_I2C_V1_40005800_IRQ_EVENT_PRIORITY
@ -41,6 +43,8 @@
#define CONFIG_I2C_2_EVENT_IRQ ST_STM32_I2C_V1_40005800_IRQ_EVENT
#define CONFIG_I2C_2_ERROR_IRQ ST_STM32_I2C_V1_40005800_IRQ_ERROR
#define CONFIG_I2C_2_BITRATE ST_STM32_I2C_V1_40005800_CLOCK_FREQUENCY
#define CONFIG_I2C_2_CLOCK_BITS ST_STM32_I2C_V1_40005800_CLOCK_BITS
#define CONFIG_I2C_2_CLOCK_BUS ST_STM32_I2C_V1_40005800_CLOCK_BUS
#define CONFIG_I2C_3_BASE_ADDRESS ST_STM32_I2C_V1_40005C00_BASE_ADDRESS
#define CONFIG_I2C_3_EVENT_IRQ_PRI ST_STM32_I2C_V1_40005C00_IRQ_EVENT_PRIORITY
@ -49,6 +53,8 @@
#define CONFIG_I2C_3_EVENT_IRQ ST_STM32_I2C_V1_40005C00_IRQ_EVENT
#define CONFIG_I2C_3_ERROR_IRQ ST_STM32_I2C_V1_40005C00_IRQ_ERROR
#define CONFIG_I2C_3_BITRATE ST_STM32_I2C_V1_40005C00_CLOCK_FREQUENCY
#define CONFIG_I2C_3_CLOCK_BITS ST_STM32_I2C_V1_40005C00_CLOCK_BITS
#define CONFIG_I2C_3_CLOCK_BUS ST_STM32_I2C_V1_40005C00_CLOCK_BUS
#define CONFIG_SPI_1_BASE_ADDRESS ST_STM32_SPI_40013000_BASE_ADDRESS
#define CONFIG_SPI_1_IRQ_PRI ST_STM32_SPI_40013000_IRQ_0_PRIORITY

6
soc/arm/st_stm32/stm32f7/dts_fixup.h
View file

@ -57,6 +57,8 @@
#define CONFIG_I2C_1_EVENT_IRQ ST_STM32_I2C_V2_40005400_IRQ_EVENT
#define CONFIG_I2C_1_ERROR_IRQ ST_STM32_I2C_V2_40005400_IRQ_ERROR
#define CONFIG_I2C_1_BITRATE ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
#define CONFIG_I2C_1_CLOCK_BITS ST_STM32_I2C_V2_40005400_CLOCK_BITS
#define CONFIG_I2C_1_CLOCK_BUS ST_STM32_I2C_V2_40005400_CLOCK_BUS
#define CONFIG_I2C_2_BASE_ADDRESS ST_STM32_I2C_V2_40005800_BASE_ADDRESS
#define CONFIG_I2C_2_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_EVENT_PRIORITY
@ -65,6 +67,8 @@
#define CONFIG_I2C_2_EVENT_IRQ ST_STM32_I2C_V2_40005800_IRQ_EVENT
#define CONFIG_I2C_2_ERROR_IRQ ST_STM32_I2C_V2_40005800_IRQ_ERROR
#define CONFIG_I2C_2_BITRATE ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
#define CONFIG_I2C_2_CLOCK_BITS ST_STM32_I2C_V2_40005800_CLOCK_BITS
#define CONFIG_I2C_2_CLOCK_BUS ST_STM32_I2C_V2_40005800_CLOCK_BUS
#define CONFIG_I2C_3_BASE_ADDRESS ST_STM32_I2C_V2_40005C00_BASE_ADDRESS
#define CONFIG_I2C_3_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005C00_IRQ_EVENT_PRIORITY
@ -73,6 +77,8 @@
#define CONFIG_I2C_3_EVENT_IRQ ST_STM32_I2C_V2_40005C00_IRQ_EVENT
#define CONFIG_I2C_3_ERROR_IRQ ST_STM32_I2C_V2_40005C00_IRQ_ERROR
#define CONFIG_I2C_3_BITRATE ST_STM32_I2C_V2_40005C00_CLOCK_FREQUENCY
#define CONFIG_I2C_3_CLOCK_BITS ST_STM32_I2C_V2_40005C00_CLOCK_BITS
#define CONFIG_I2C_3_CLOCK_BUS ST_STM32_I2C_V2_40005C00_CLOCK_BUS
#define CONFIG_SPI_1_BASE_ADDRESS ST_STM32_SPI_40013000_BASE_ADDRESS
#define CONFIG_SPI_1_IRQ_PRI ST_STM32_SPI_40013000_IRQ_0_PRIORITY

6
soc/arm/st_stm32/stm32l0/dts_fixup.h
View file

@ -25,18 +25,24 @@
#define CONFIG_I2C_1_NAME ST_STM32_I2C_V2_40005400_LABEL
#define CONFIG_I2C_1_COMBINED_IRQ ST_STM32_I2C_V2_40005400_IRQ_COMBINED
#define CONFIG_I2C_1_BITRATE ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
#define CONFIG_I2C_1_CLOCK_BITS ST_STM32_I2C_V2_40005400_CLOCK_BITS
#define CONFIG_I2C_1_CLOCK_BUS ST_STM32_I2C_V2_40005400_CLOCK_BUS
#define CONFIG_I2C_2_BASE_ADDRESS ST_STM32_I2C_V2_40005800_BASE_ADDRESS
#define CONFIG_I2C_2_COMBINED_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_COMBINED_PRIORITY
#define CONFIG_I2C_2_NAME ST_STM32_I2C_V2_40005800_LABEL
#define CONFIG_I2C_2_COMBINED_IRQ ST_STM32_I2C_V2_40005800_IRQ_COMBINED
#define CONFIG_I2C_2_BITRATE ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
#define CONFIG_I2C_2_CLOCK_BITS ST_STM32_I2C_V2_40005800_CLOCK_BITS
#define CONFIG_I2C_2_CLOCK_BUS ST_STM32_I2C_V2_40005800_CLOCK_BUS
#define CONFIG_I2C_3_BASE_ADDRESS ST_STM32_I2C_V2_40007800_BASE_ADDRESS
#define CONFIG_I2C_3_COMBINED_IRQ_PRI ST_STM32_I2C_V2_40007800_IRQ_COMBINED_PRIORITY
#define CONFIG_I2C_3_NAME ST_STM32_I2C_V2_40007800_LABEL
#define CONFIG_I2C_3_COMBINED_IRQ ST_STM32_I2C_V2_40007800_IRQ_COMBINED
#define CONFIG_I2C_3_BITRATE ST_STM32_I2C_V2_40007800_CLOCK_FREQUENCY
#define CONFIG_I2C_3_CLOCK_BITS ST_STM32_I2C_V2_40007800_CLOCK_BITS
#define CONFIG_I2C_3_CLOCK_BUS ST_STM32_I2C_V2_40007800_CLOCK_BUS
#define CONFIG_SPI_1_BASE_ADDRESS ST_STM32_SPI_40013000_BASE_ADDRESS
#define CONFIG_SPI_1_IRQ_PRI ST_STM32_SPI_40013000_IRQ_0_PRIORITY

8
soc/arm/st_stm32/stm32l4/dts_fixup.h
View file

@ -45,6 +45,8 @@
#define CONFIG_I2C_1_EVENT_IRQ ST_STM32_I2C_V2_40005400_IRQ_EVENT
#define CONFIG_I2C_1_ERROR_IRQ ST_STM32_I2C_V2_40005400_IRQ_ERROR
#define CONFIG_I2C_1_BITRATE ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
#define CONFIG_I2C_1_CLOCK_BITS ST_STM32_I2C_V2_40005400_CLOCK_BITS
#define CONFIG_I2C_1_CLOCK_BUS ST_STM32_I2C_V2_40005400_CLOCK_BUS
#define CONFIG_I2C_2_BASE_ADDRESS ST_STM32_I2C_V2_40005800_BASE_ADDRESS
#define CONFIG_I2C_2_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_EVENT_PRIORITY
@ -53,6 +55,8 @@
#define CONFIG_I2C_2_EVENT_IRQ ST_STM32_I2C_V2_40005800_IRQ_EVENT
#define CONFIG_I2C_2_ERROR_IRQ ST_STM32_I2C_V2_40005800_IRQ_ERROR
#define CONFIG_I2C_2_BITRATE ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
#define CONFIG_I2C_2_CLOCK_BITS ST_STM32_I2C_V2_40005800_CLOCK_BITS
#define CONFIG_I2C_2_CLOCK_BUS ST_STM32_I2C_V2_40005800_CLOCK_BUS
#define CONFIG_I2C_3_BASE_ADDRESS ST_STM32_I2C_V2_40005C00_BASE_ADDRESS
#define CONFIG_I2C_3_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005C00_IRQ_EVENT_PRIORITY
@ -61,6 +65,8 @@
#define CONFIG_I2C_3_EVENT_IRQ ST_STM32_I2C_V2_40005C00_IRQ_EVENT
#define CONFIG_I2C_3_ERROR_IRQ ST_STM32_I2C_V2_40005C00_IRQ_ERROR
#define CONFIG_I2C_3_BITRATE ST_STM32_I2C_V2_40005C00_CLOCK_FREQUENCY
#define CONFIG_I2C_3_CLOCK_BITS ST_STM32_I2C_V2_40005C00_CLOCK_BITS
#define CONFIG_I2C_3_CLOCK_BUS ST_STM32_I2C_V2_40005C00_CLOCK_BUS
#define CONFIG_I2C_4_BASE_ADDRESS ST_STM32_I2C_V2_40008400_BASE_ADDRESS
#define CONFIG_I2C_4_EVENT_IRQ_PRI ST_STM32_I2C_V2_40008400_IRQ_EVENT_PRIORITY
@ -69,6 +75,8 @@
#define CONFIG_I2C_4_EVENT_IRQ ST_STM32_I2C_V2_40008400_IRQ_EVENT
#define CONFIG_I2C_4_ERROR_IRQ ST_STM32_I2C_V2_40008400_IRQ_ERROR
#define CONFIG_I2C_4_BITRATE ST_STM32_I2C_V2_40008400_CLOCK_FREQUENCY
#define CONFIG_I2C_4_CLOCK_BITS ST_STM32_I2C_V2_40008400_CLOCK_BITS
#define CONFIG_I2C_4_CLOCK_BUS ST_STM32_I2C_V2_40008400_CLOCK_BUS
#define CONFIG_RTC_0_BASE_ADDRESS ST_STM32_RTC_40002800_BASE_ADDRESS
#define CONFIG_RTC_0_IRQ_PRI ST_STM32_RTC_40002800_IRQ_0_PRIORITY