frdm_k64f: gpio: pinmux: remove base addr and irq from kconfig

The base address and IRQ line are static per SoC, so there is no need
to make them configurable in Kconfig.

Change-Id: Ib78401ff136c29642356f5bda9d6cd3e5c98bece
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
Daniel Leung 2016-03-25 15:27:54 -07:00 committed by Anas Nashif
commit 9c62a4a01f
5 changed files with 55 additions and 150 deletions

View file

@ -134,56 +134,6 @@ config GPIO_K64_D
config GPIO_K64_E
def_bool y
if GPIO_K64_A
config GPIO_K64_A_BASE_ADDR
default 0x400FF000
config PORT_K64_A_BASE_ADDR
default 0x40049000
endif # GPIO_K64_A
if GPIO_K64_B
config GPIO_K64_B_BASE_ADDR
default 0x400FF040
config PORT_K64_B_BASE_ADDR
default 0x4004A000
endif # GPIO_K64_B
if GPIO_K64_C
config GPIO_K64_C_BASE_ADDR
default 0x400FF080
config PORT_K64_C_BASE_ADDR
default 0x4004B000
endif # GPIO_K64_C
if GPIO_K64_D
config GPIO_K64_D_BASE_ADDR
default 0x400FF0C0
config PORT_K64_D_BASE_ADDR
default 0x4004C000
endif # GPIO_K64_D
if GPIO_K64_E
config GPIO_K64_E_BASE_ADDR
default 0x400FF100
config PORT_K64_E_BASE_ADDR
default 0x4004D000
endif # GPIO_K64_E
endif # GPIO_K64
endif # GPIO

View file

@ -185,6 +185,34 @@ extern "C" {
#endif /* CONFIG_UART_CONSOLE */
/*
* GPIO configuration settings
*/
#if defined(CONFIG_GPIO_K64)
#define GPIO_K64_A_BASE_ADDR 0x400FF000
#define GPIO_K64_A_IRQ IRQ_GPIO_PORTA
#define GPIO_K64_B_BASE_ADDR 0x400FF040
#define GPIO_K64_B_IRQ IRQ_GPIO_PORTB
#define GPIO_K64_C_BASE_ADDR 0x400FF080
#define GPIO_K64_C_IRQ IRQ_GPIO_PORTC
#define GPIO_K64_D_BASE_ADDR 0x400FF0C0
#define GPIO_K64_D_IRQ IRQ_GPIO_PORTD
#define GPIO_K64_E_BASE_ADDR 0x400FF100
#define GPIO_K64_E_IRQ IRQ_GPIO_PORTE
#endif /* CONFIG_GPIO_K64 */
#define PORT_K64_A_BASE_ADDR 0x40049000
#define PORT_K64_B_BASE_ADDR 0x4004A000
#define PORT_K64_C_BASE_ADDR 0x4004B000
#define PORT_K64_D_BASE_ADDR 0x4004C000
#define PORT_K64_E_BASE_ADDR 0x4004D000
#endif /* !_ASMLANGUAGE */
#ifdef __cplusplus

View file

@ -45,21 +45,6 @@ config GPIO_K64_A_DEV_NAME
help
Specify the device name.
config GPIO_K64_A_BASE_ADDR
hex # Freescale K64-based GPIO Port A base address
depends on GPIO_K64_A
config PORT_K64_A_BASE_ADDR
hex # Freescale K64-based Port Control Port A base address
depends on GPIO_K64_A
config GPIO_K64_PORTA_IRQ
int "Freescale K64-based Port A interrupt number"
depends on GPIO_K64_A
default 59
help
K64 Port A IRQ number for the interrupt controller
config GPIO_K64_PORTA_PRI
int "Freescale K64-based Port A interrupt priority"
depends on GPIO_K64_A
@ -81,21 +66,6 @@ config GPIO_K64_B_DEV_NAME
help
Specify the device name.
config GPIO_K64_B_BASE_ADDR
hex # Freescale K64-based GPIO Port B base address
depends on GPIO_K64_B
config PORT_K64_B_BASE_ADDR
hex # Freescale K64-based Port Control Port B base address
depends on GPIO_K64_B
config GPIO_K64_PORTB_IRQ
int "Freescale K64-based Port B interrupt number"
depends on GPIO_K64_B
default 60
help
K64 Port B IRQ number for the interrupt controller
config GPIO_K64_PORTB_PRI
int "Freescale K64-based Port B interrupt priority"
depends on GPIO_K64_B
@ -117,21 +87,6 @@ config GPIO_K64_C_DEV_NAME
help
Specify the device name.
config GPIO_K64_C_BASE_ADDR
hex # Freescale K64-based GPIO Port C base address
depends on GPIO_K64_C
config PORT_K64_C_BASE_ADDR
hex # Freescale K64-based Port Control Port C base address
depends on GPIO_K64_C
config GPIO_K64_PORTC_IRQ
int "Freescale K64-based Port C interrupt number"
depends on GPIO_K64_C
default 61
help
K64 Port C IRQ number for the interrupt controller
config GPIO_K64_PORTC_PRI
int "Freescale K64-based Port C interrupt priority"
depends on GPIO_K64_C
@ -153,21 +108,6 @@ config GPIO_K64_D_DEV_NAME
help
Specify the device name.
config GPIO_K64_D_BASE_ADDR
hex # Freescale K64-based GPIO Port D base address
depends on GPIO_K64_D
config PORT_K64_D_BASE_ADDR
hex # Freescale K64-based Port Control Port D base address
depends on GPIO_K64_D
config GPIO_K64_PORTD_IRQ
int "Freescale K64-based Port D interrupt number"
depends on GPIO_K64_D
default 62
help
K64 Port D IRQ number for the interrupt controller
config GPIO_K64_PORTD_PRI
int "Freescale K64-based Port D interrupt priority"
depends on GPIO_K64_D
@ -189,21 +129,6 @@ config GPIO_K64_E_DEV_NAME
help
Specify the device name.
config GPIO_K64_E_BASE_ADDR
hex # Freescale K64-based GPIO Port E base address
depends on GPIO_K64_E
config PORT_K64_E_BASE_ADDR
hex # Freescale K64-based Port Control Port E base address
depends on GPIO_K64_E
config GPIO_K64_PORTE_IRQ
int "Freescale K64-based Port E interrupt number"
depends on GPIO_K64_E
default 63
help
K64 Port E IRQ number for the interrupt controller
config GPIO_K64_PORTE_PRI
int "Freescale K64-based Port E interrupt priority"
depends on GPIO_K64_E

View file

@ -24,6 +24,7 @@
#include <device.h>
#include <init.h>
#include <gpio.h>
#include <soc.h>
#include <sys_io.h>
#include <pinmux/frdm_k64f/pinmux_k64.h>
@ -296,8 +297,8 @@ int gpio_k64_init(struct device *dev)
static int gpio_k64_A_init(struct device *dev);
static struct gpio_k64_config gpio_k64_A_cfg = {
.gpio_base_addr = CONFIG_GPIO_K64_A_BASE_ADDR,
.port_base_addr = CONFIG_PORT_K64_A_BASE_ADDR,
.gpio_base_addr = GPIO_K64_A_BASE_ADDR,
.port_base_addr = PORT_K64_A_BASE_ADDR,
};
static struct gpio_k64_data gpio_data_A;
@ -308,10 +309,10 @@ DEVICE_INIT(gpio_k64_A, CONFIG_GPIO_K64_A_DEV_NAME, gpio_k64_A_init,
static int gpio_k64_A_init(struct device *dev)
{
IRQ_CONNECT(CONFIG_GPIO_K64_PORTA_IRQ, CONFIG_GPIO_K64_PORTA_PRI,
IRQ_CONNECT(GPIO_K64_A_IRQ, CONFIG_GPIO_K64_PORTA_PRI,
gpio_k64_port_isr, DEVICE_GET(gpio_k64_A), 0);
irq_enable(CONFIG_GPIO_K64_PORTA_IRQ);
irq_enable(GPIO_K64_A_IRQ);
return gpio_k64_init(dev);
}
@ -324,8 +325,8 @@ static int gpio_k64_A_init(struct device *dev)
static int gpio_k64_B_init(struct device *dev);
static struct gpio_k64_config gpio_k64_B_cfg = {
.gpio_base_addr = CONFIG_GPIO_K64_B_BASE_ADDR,
.port_base_addr = CONFIG_PORT_K64_B_BASE_ADDR,
.gpio_base_addr = GPIO_K64_B_BASE_ADDR,
.port_base_addr = PORT_K64_B_BASE_ADDR,
};
static struct gpio_k64_data gpio_data_B;
@ -336,10 +337,10 @@ DEVICE_INIT(gpio_k64_B, CONFIG_GPIO_K64_B_DEV_NAME, gpio_k64_B_init,
static int gpio_k64_B_init(struct device *dev)
{
IRQ_CONNECT(CONFIG_GPIO_K64_PORTB_IRQ, CONFIG_GPIO_K64_PORTB_PRI,
IRQ_CONNECT(GPIO_K64_B_IRQ, CONFIG_GPIO_K64_PORTB_PRI,
gpio_k64_port_isr, DEVICE_GET(gpio_k64_B), 0);
irq_enable(CONFIG_GPIO_K64_PORTB_IRQ);
irq_enable(GPIO_K64_B_IRQ);
return gpio_k64_init(dev);
}
@ -352,8 +353,8 @@ static int gpio_k64_B_init(struct device *dev)
static int gpio_k64_C_init(struct device *dev);
static struct gpio_k64_config gpio_k64_C_cfg = {
.gpio_base_addr = CONFIG_GPIO_K64_C_BASE_ADDR,
.port_base_addr = CONFIG_PORT_K64_C_BASE_ADDR,
.gpio_base_addr = GPIO_K64_C_BASE_ADDR,
.port_base_addr = PORT_K64_C_BASE_ADDR,
};
static struct gpio_k64_data gpio_data_C;
@ -364,10 +365,10 @@ DEVICE_INIT(gpio_k64_C, CONFIG_GPIO_K64_C_DEV_NAME, gpio_k64_C_init,
static int gpio_k64_C_init(struct device *dev)
{
IRQ_CONNECT(CONFIG_GPIO_K64_PORTC_IRQ, CONFIG_GPIO_K64_PORTC_PRI,
IRQ_CONNECT(GPIO_K64_C_IRQ, CONFIG_GPIO_K64_PORTC_PRI,
gpio_k64_port_isr, DEVICE_GET(gpio_k64_C), 0);
irq_enable(CONFIG_GPIO_K64_PORTC_IRQ);
irq_enable(GPIO_K64_C_IRQ);
return gpio_k64_init(dev);
}
@ -380,8 +381,8 @@ static int gpio_k64_C_init(struct device *dev)
static int gpio_k64_D_init(struct device *dev);
static struct gpio_k64_config gpio_k64_D_cfg = {
.gpio_base_addr = CONFIG_GPIO_K64_D_BASE_ADDR,
.port_base_addr = CONFIG_PORT_K64_D_BASE_ADDR,
.gpio_base_addr = GPIO_K64_D_BASE_ADDR,
.port_base_addr = PORT_K64_D_BASE_ADDR,
};
static struct gpio_k64_data gpio_data_D;
@ -392,10 +393,10 @@ DEVICE_INIT(gpio_k64_D, CONFIG_GPIO_K64_D_DEV_NAME, gpio_k64_D_init,
static int gpio_k64_D_init(struct device *dev)
{
IRQ_CONNECT(CONFIG_GPIO_K64_PORTD_IRQ, CONFIG_GPIO_K64_PORTD_PRI,
IRQ_CONNECT(GPIO_K64_D_IRQ, CONFIG_GPIO_K64_PORTD_PRI,
gpio_k64_port_isr, DEVICE_GET(gpio_k64_D), 0);
irq_enable(CONFIG_GPIO_K64_PORTD_IRQ);
irq_enable(GPIO_K64_D_IRQ);
return gpio_k64_init(dev);
}
@ -408,8 +409,8 @@ static int gpio_k64_D_init(struct device *dev)
static int gpio_k64_E_init(struct device *dev);
static struct gpio_k64_config gpio_k64_E_cfg = {
.gpio_base_addr = CONFIG_GPIO_K64_E_BASE_ADDR,
.port_base_addr = CONFIG_PORT_K64_E_BASE_ADDR,
.gpio_base_addr = GPIO_K64_E_BASE_ADDR,
.port_base_addr = PORT_K64_E_BASE_ADDR,
};
static struct gpio_k64_data gpio_data_E;
@ -420,10 +421,10 @@ DEVICE_INIT(gpio_k64_E, CONFIG_GPIO_K64_E_DEV_NAME, gpio_k64_E_init,
static int gpio_k64_E_init(struct device *dev)
{
IRQ_CONNECT(CONFIG_GPIO_K64_PORTE_IRQ, CONFIG_GPIO_K64_PORTE_PRI,
IRQ_CONNECT(GPIO_K64_E_IRQ, CONFIG_GPIO_K64_PORTE_PRI,
gpio_k64_port_isr, DEVICE_GET(gpio_k64_E), 0);
irq_enable(CONFIG_GPIO_K64_PORTE_IRQ);
irq_enable(GPIO_K64_E_IRQ);
return gpio_k64_init(dev);
}

View file

@ -21,6 +21,7 @@
#include <nanokernel.h>
#include <device.h>
#include <init.h>
#include <soc.h>
#include <sys_io.h>
#include <pinmux.h>
#include <pinmux/pinmux.h>
@ -33,7 +34,7 @@
#ifdef CONFIG_GPIO_K64_A
static inline int config_port_a(mem_addr_t *addr)
{
*addr = CONFIG_PORT_K64_A_BASE_ADDR;
*addr = PORT_K64_A_BASE_ADDR;
return 0;
}
#else
@ -43,7 +44,7 @@ static inline int config_port_a(mem_addr_t *addr)
#ifdef CONFIG_GPIO_K64_B
static inline int config_port_b(mem_addr_t *addr)
{
*addr = CONFIG_PORT_K64_B_BASE_ADDR;
*addr = PORT_K64_B_BASE_ADDR;
return 0;
}
#else
@ -53,7 +54,7 @@ static inline int config_port_b(mem_addr_t *addr)
#ifdef CONFIG_GPIO_K64_C
static inline int config_port_c(mem_addr_t *addr)
{
*addr = CONFIG_PORT_K64_C_BASE_ADDR;
*addr = PORT_K64_C_BASE_ADDR;
return 0;
}
#else
@ -63,7 +64,7 @@ static inline int config_port_c(mem_addr_t *addr)
#ifdef CONFIG_GPIO_K64_D
static inline int config_port_d(mem_addr_t *addr)
{
*addr = CONFIG_PORT_K64_D_BASE_ADDR;
*addr = PORT_K64_D_BASE_ADDR;
return 0;
}
#else
@ -73,7 +74,7 @@ static inline int config_port_d(mem_addr_t *addr)
#ifdef CONFIG_GPIO_K64_E
static inline int config_port_e(mem_addr_t *addr)
{
*addr = CONFIG_PORT_K64_E_BASE_ADDR;
*addr = PORT_K64_E_BASE_ADDR;
return 0;
}
#else