ITE: soc: it8xxx2: add register build asserts to validate the offsets

Add build asserts to validate the offsets are the expected value.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
This commit is contained in:
Tim Lin 2021-08-24 09:59:41 +08:00 committed by Anas Nashif
commit 9938519c93
3 changed files with 28 additions and 0 deletions

View file

@ -1,6 +1,7 @@
zephyr_include_directories(.) zephyr_include_directories(.)
zephyr_sources( zephyr_sources(
check_regs.c
soc_irq.S soc_irq.S
soc_common_irq.c soc_common_irq.c
vector.S vector.S

View file

@ -0,0 +1,16 @@
/*
* Copyright (c) 2021 ITE Corporation. All Rights Reserved.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <device.h>
#include <soc.h>
/* GCTRL register structure check */
IT8XXX2_REG_SIZE_CHECK(gctrl_it8xxx2_regs, 0x88);
IT8XXX2_REG_OFFSET_CHECK(gctrl_it8xxx2_regs, GCTRL_RSTS, 0x06);
IT8XXX2_REG_OFFSET_CHECK(gctrl_it8xxx2_regs, GCTRL_SPCTRL4, 0x1c);
IT8XXX2_REG_OFFSET_CHECK(gctrl_it8xxx2_regs, GCTRL_RSTC5, 0x21);
IT8XXX2_REG_OFFSET_CHECK(gctrl_it8xxx2_regs, GCTRL_MCCR2, 0x44);
IT8XXX2_REG_OFFSET_CHECK(gctrl_it8xxx2_regs, GCTRL_ECHIPID2, 0x86);

View file

@ -734,6 +734,17 @@
#define CLS BIT(1) #define CLS BIT(1)
#define DLS BIT(0) #define DLS BIT(0)
/*
* IT8XXX2 register structure size/offset checking macro function to mitigate
* the risk of unexpected compiling results.
*/
#define IT8XXX2_REG_SIZE_CHECK(reg_def, size) \
BUILD_ASSERT(sizeof(struct reg_def) == size, \
"Failed in size check of register structure!")
#define IT8XXX2_REG_OFFSET_CHECK(reg_def, member, offset) \
BUILD_ASSERT(offsetof(struct reg_def, member) == offset, \
"Failed in offset check of register structure member!")
/** /**
* *
* (18xxh) PWM & SmartAuto Fan Control (PWM) * (18xxh) PWM & SmartAuto Fan Control (PWM)