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arch: xtensa: Move exception table to xtensa_intr.c

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This cleans up the exception handling by removing the table declaration
from xtensa_intr_asm.S, and removing the unused
_xt_set_exception_handler() function.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
This commit is contained in:
Leandro Pereira 2017-07-19 13:50:50 -07:00 • committed by Andrew Boie
commit 99181eb661
15 changed files with 17 additions and 68 deletions
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37
arch/xtensa/core/xtensa_intr.c
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@ -17,44 +17,15 @@
#include <sw_isr_table.h> #include <sw_isr_table.h>
#if XCHAL_HAVE_EXCEPTIONS #if XCHAL_HAVE_EXCEPTIONS
static void unhandled_exception_trampoline(XtExcFrame *frame)
/* Handler table is in xtensa_intr_asm.S */
extern xt_exc_handler _xt_exception_table[XCHAL_EXCCAUSE_NUM];
/*
* Default handler for unhandled exceptions.
*/
void xt_unhandled_exception(XtExcFrame *frame)
{ {
FatalErrorHandler(); FatalErrorHandler();
CODE_UNREACHABLE; CODE_UNREACHABLE;
} }
xt_exc_handler _xt_exception_table[XCHAL_EXCCAUSE_NUM] __aligned(4) = {
/* [0 ... (XCHAL_EXCCAUSE_NUM - 1)] = unhandled_exception_trampoline
* This function registers a handler for the specified exception. };
* The function returns the address of the previous handler.
* On error, it returns 0.
*/
xt_exc_handler _xt_set_exception_handler(int n, xt_exc_handler f)
{
xt_exc_handler old;
if (n < 0 || n >= XCHAL_EXCCAUSE_NUM)
return 0; /* invalid exception number */
old = _xt_exception_table[n];
if (f) {
_xt_exception_table[n] = f;
} else {
_xt_exception_table[n] = &xt_unhandled_exception;
}
return ((old == &xt_unhandled_exception) ? 0 : old);
}
#endif #endif
#if defined(CONFIG_SW_ISR_TABLE) && defined(XCHAL_HAVE_INTERRUPTS) #if defined(CONFIG_SW_ISR_TABLE) && defined(XCHAL_HAVE_INTERRUPTS)

22
arch/xtensa/core/xtensa_intr_asm.S
View file

@ -39,28 +39,6 @@ _xt_vpri_mask: .word 0xFFFFFFFF /* Virtual priority mask */
#endif /* XCHAL_HAVE_INTERRUPTS */ #endif /* XCHAL_HAVE_INTERRUPTS */
#if XCHAL_HAVE_EXCEPTIONS
/*
-------------------------------------------------------------------------------
Table of C-callable exception handlers for each exception. Note that not all
slots will be active, because some exceptions (e.g. coprocessor exceptions)
are always handled by the OS and cannot be hooked by user handlers.
-------------------------------------------------------------------------------
*/
.data
.global _xt_exception_table
.align 4
_xt_exception_table:
.rept XCHAL_EXCCAUSE_NUM
.word xt_unhandled_exception /* handler address */
.endr
#endif
/* /*
------------------------------------------------------------------------------- -------------------------------------------------------------------------------
unsigned int _xt_ints_on ( unsigned int mask ) unsigned int _xt_ints_on ( unsigned int mask )

2
arch/xtensa/soc/D_108mini/linker.ld
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@ -50,7 +50,7 @@ MEMORY
srom1_seg : org = 0x50000300, len = 0xFFFD00 srom1_seg : org = 0x50000300, len = 0xFFFD00
sram0_seg : org = 0x60000000, len = 0x4000000 sram0_seg : org = 0x60000000, len = 0x4000000
#ifdef CONFIG_GEN_ISR_TABLES #ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0xffffdfff, len = 0x2000 IDT_LIST : org = 0x3ffbe000, len = 0x2000
#endif #endif
} }

2
arch/xtensa/soc/D_212GP/linker.ld
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@ -50,7 +50,7 @@ MEMORY
sram18_seg : org = 0x600003C0, len = 0x40 sram18_seg : org = 0x600003C0, len = 0x40
sram19_seg : org = 0x60000400, len = 0x3FFFC00 sram19_seg : org = 0x60000400, len = 0x3FFFC00
#ifdef CONFIG_GEN_ISR_TABLES #ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0xffffdfff, len = 0x2000 IDT_LIST : org = 0x3ffbe000, len = 0x2000
#endif #endif
} }

2
arch/xtensa/soc/D_233L/linker.ld
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@ -47,7 +47,7 @@ MEMORY
srom0_seg : org = 0xFE000000, len = 0x300 srom0_seg : org = 0xFE000000, len = 0x300
srom1_seg : org = 0xFE000300, len = 0xFFFD00 srom1_seg : org = 0xFE000300, len = 0xFFFD00
#ifdef CONFIG_GEN_ISR_TABLES #ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0xffffdfff, len = 0x2000 IDT_LIST : org = 0x3ffdd50, len = 0x2000
#endif #endif
} }

2
arch/xtensa/soc/XRC_D2PM_5swIrq/linker.ld
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@ -50,7 +50,7 @@ MEMORY
sram18_seg : org = 0x6000027C, len = 0x1C sram18_seg : org = 0x6000027C, len = 0x1C
sram19_seg : org = 0x60000298, len = 0x3FFFD68 sram19_seg : org = 0x60000298, len = 0x3FFFD68
#ifdef CONFIG_GEN_ISR_TABLES #ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0xffffdfff, len = 0x2000 IDT_LIST : org = 0x3fffe000, len = 0x2000
#endif #endif
} }

2
arch/xtensa/soc/XRC_FUSION_AON_ALL_LM/linker.ld
View file

@ -35,7 +35,7 @@ MEMORY
srom1_seg : org = 0x50000300, len = 0xFFFD00 srom1_seg : org = 0x50000300, len = 0xFFFD00
sram0_seg : org = 0x60000000, len = 0x4000000 sram0_seg : org = 0x60000000, len = 0x4000000
#ifdef CONFIG_GEN_ISR_TABLES #ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0xffffdfff, len = 0x2000 IDT_LIST : org = 0x3ffde000, len = 0x2000
#endif #endif
} }

2
arch/xtensa/soc/esp32/linker.ld
View file

@ -38,7 +38,7 @@ MEMORY
rtc_iram_seg(RWX): org = 0x400C0000, len = 0x2000 rtc_iram_seg(RWX): org = 0x400C0000, len = 0x2000
rtc_slow_seg(RW): org = 0x50000000, len = 0x1000 rtc_slow_seg(RW): org = 0x50000000, len = 0x1000
#ifdef CONFIG_GEN_ISR_TABLES #ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST(RW): org = 0xffffdfff, len = 0x2000 IDT_LIST(RW): org = 0x3ebfe010, len = 0x2000
#endif #endif
} }

2
arch/xtensa/soc/hifi2_std/linker.ld
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@ -50,7 +50,7 @@ MEMORY
sram18_seg : org = 0x600003C0, len = 0x40 sram18_seg : org = 0x600003C0, len = 0x40
sram19_seg : org = 0x60000400, len = 0x3FFFC00 sram19_seg : org = 0x60000400, len = 0x3FFFC00
#ifdef CONFIG_GEN_ISR_TABLES #ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0xffffdfff, len = 0x2000 IDT_LIST : org = 0x3ffbe000, len = 0x2000
#endif #endif
} }

2
arch/xtensa/soc/hifi3_bd5/linker.ld
View file

@ -37,7 +37,7 @@ MEMORY
sram8_seg : org = 0x600001DC, len = 0x1C sram8_seg : org = 0x600001DC, len = 0x1C
sram9_seg : org = 0x600001F8, len = 0x3FFFE08 sram9_seg : org = 0x600001F8, len = 0x3FFFE08
#ifdef CONFIG_GEN_ISR_TABLES #ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0xffffdfff, len = 0x2000 IDT_LIST : org = 0x4fffe000, len = 0x2000
#endif #endif
} }

2
arch/xtensa/soc/hifi3_bd5_call0/linker.ld
View file

@ -37,7 +37,7 @@ MEMORY
sram8_seg : org = 0x600001DC, len = 0x1C sram8_seg : org = 0x600001DC, len = 0x1C
sram9_seg : org = 0x600001F8, len = 0x3FFFE08 sram9_seg : org = 0x600001F8, len = 0x3FFFE08
#ifdef CONFIG_GEN_ISR_TABLES #ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0xffffdfff, len = 0x2000 IDT_LIST : org = 0x4fffe000, len = 0x2000
#endif #endif
} }

2
arch/xtensa/soc/hifi4_bd7/linker.ld
View file

@ -41,7 +41,7 @@ MEMORY
sram12_seg : org = 0x60000300, len = 0x40 sram12_seg : org = 0x60000300, len = 0x40
sram13_seg : org = 0x60000340, len = 0x3FFCC0 sram13_seg : org = 0x60000340, len = 0x3FFCC0
#ifdef CONFIG_GEN_ISR_TABLES #ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0xffffdfff, len = 0x2000 IDT_LIST : org = 0x4fffe000, len = 0x2000
#endif #endif
} }

2
arch/xtensa/soc/hifi_mini/linker.ld
View file

@ -34,7 +34,7 @@ MEMORY
iram0_6_seg : org = 0x60020324, len = 0x1C iram0_6_seg : org = 0x60020324, len = 0x1C
iram0_7_seg : org = 0x60020340, len = 0x1FCC0 iram0_7_seg : org = 0x60020340, len = 0x1FCC0
#ifdef CONFIG_GEN_ISR_TABLES #ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0xffffdfff, len = 0x2000 IDT_LIST : org = 0x5fffe000, len = 0x2000
#endif #endif
} }

2
arch/xtensa/soc/hifi_mini_4swIrq/linker.ld
View file

@ -34,7 +34,7 @@ MEMORY
iram0_6_seg : org = 0x60020324, len = 0x1C iram0_6_seg : org = 0x60020324, len = 0x1C
iram0_7_seg : org = 0x60020340, len = 0x1FCC0 iram0_7_seg : org = 0x60020340, len = 0x1FCC0
#ifdef CONFIG_GEN_ISR_TABLES #ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0xffffdfff, len = 0x2000 IDT_LIST : org = 0x5fffe000, len = 0x2000
#endif #endif
} }

2
arch/xtensa/soc/sample_controller/linker.ld
View file

@ -50,7 +50,7 @@ MEMORY
srom1_seg : org = 0x50000300, len = 0xFFFD00 srom1_seg : org = 0x50000300, len = 0xFFFD00
sram0_seg : org = 0x60000000, len = 0x4000000 sram0_seg : org = 0x60000000, len = 0x4000000
#ifdef CONFIG_GEN_ISR_TABLES #ifdef CONFIG_GEN_ISR_TABLES
IDT_LIST : org = 0xffffdfff, len = 0x2000 IDT_LIST : org = 0x3ffbe000, len = 0x2000
#endif #endif
} }