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gpio: stm32 use dts extracted information to populate gpio instances.

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The information extracted from the device tree is now used to initialize
GPIO device instances. Up until now the GPIO device driver made no use
of this information. Actual instance creation is still controlled using
the Kconfig method. Missing GPIO device tree nodes were added in the
process for STM32L073, STM32F413 and STM32F373.

The information for gpio instance initialization has already been
present for supported STM32 SoCs but remained unused. Changes in the
device tree had no effect on GPIO functionality and was essentially
redundant. Using the device tree for hardware description seems
plausible and less painful than a myriad of defines in some SoC
description header.

The change was implemented under the assumption that current device
trees provide a correct description of the SoCs. Base register addresses
and RCC register bits were not explicitly checked for each device.

Manual tests were executed on:
	- NUCLEO-F103RB
	- STM32F429I-DISCO
	- STM32F746G-DISCO
	- NUCLEO-F767ZI

Manual tests consisted of blinky on different GPIOs and pins on each
board.

sanitycheck was executed for all STM32 based boards

Fixes: #10629

Signed-off-by: Martin Bertsche <martin72216@googlemail.com>
This commit is contained in:
Martin Bertsche 2018-10-28 22:34:49 +01:00 • committed by Kumar Gala
commit 9892f40204
12 changed files with 631 additions and 12 deletions
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54
soc/arm/st_stm32/stm32f0/dts_fixup.h
View file

@ -2,6 +2,60 @@
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS ST_STM32_GPIO_48000000_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 ST_STM32_GPIO_48000000_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 ST_STM32_GPIO_48000000_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER ST_STM32_GPIO_48000000_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOA_LABEL ST_STM32_GPIO_48000000_LABEL
#define CONFIG_GPIO_STM32_GPIOA_SIZE ST_STM32_GPIO_48000000_SIZE
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS ST_STM32_GPIO_48000000_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS ST_STM32_GPIO_48000000_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS ST_STM32_GPIO_48000400_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 ST_STM32_GPIO_48000400_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 ST_STM32_GPIO_48000400_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER ST_STM32_GPIO_48000400_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOB_LABEL ST_STM32_GPIO_48000400_LABEL
#define CONFIG_GPIO_STM32_GPIOB_SIZE ST_STM32_GPIO_48000400_SIZE
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS ST_STM32_GPIO_48000400_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS ST_STM32_GPIO_48000400_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS ST_STM32_GPIO_48000800_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 ST_STM32_GPIO_48000800_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 ST_STM32_GPIO_48000800_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER ST_STM32_GPIO_48000800_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOC_LABEL ST_STM32_GPIO_48000800_LABEL
#define CONFIG_GPIO_STM32_GPIOC_SIZE ST_STM32_GPIO_48000800_SIZE
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS ST_STM32_GPIO_48000800_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS ST_STM32_GPIO_48000800_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS ST_STM32_GPIO_48000C00_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 ST_STM32_GPIO_48000C00_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 ST_STM32_GPIO_48000C00_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER ST_STM32_GPIO_48000C00_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOD_LABEL ST_STM32_GPIO_48000C00_LABEL
#define CONFIG_GPIO_STM32_GPIOD_SIZE ST_STM32_GPIO_48000C00_SIZE
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS ST_STM32_GPIO_48000C00_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS ST_STM32_GPIO_48000C00_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS ST_STM32_GPIO_48001000_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 ST_STM32_GPIO_48001000_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 ST_STM32_GPIO_48001000_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER ST_STM32_GPIO_48001000_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOE_LABEL ST_STM32_GPIO_48001000_LABEL
#define CONFIG_GPIO_STM32_GPIOE_SIZE ST_STM32_GPIO_48001000_SIZE
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS ST_STM32_GPIO_48001000_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS ST_STM32_GPIO_48001000_CLOCK_BUS
#define CONFIG_GPIO_STM32_GPIOF_BASE_ADDRESS ST_STM32_GPIO_48001400_BASE_ADDRESS
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS_0 ST_STM32_GPIO_48001400_CLOCK_BITS_0
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS_0 ST_STM32_GPIO_48001400_CLOCK_BUS_0
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_CONTROLLER ST_STM32_GPIO_48001400_CLOCK_CONTROLLER
#define CONFIG_GPIO_STM32_GPIOF_LABEL ST_STM32_GPIO_48001400_LABEL
#define CONFIG_GPIO_STM32_GPIOF_SIZE ST_STM32_GPIO_48001400_SIZE
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS ST_STM32_GPIO_48001400_CLOCK_BITS
#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS ST_STM32_GPIO_48001400_CLOCK_BUS
#define CONFIG_UART_STM32_USART_1_BASE_ADDRESS ST_STM32_USART_40013800_BASE_ADDRESS
#define CONFIG_UART_STM32_USART_1_BAUD_RATE ST_STM32_USART_40013800_CURRENT_SPEED
#define CONFIG_UART_STM32_USART_1_IRQ_PRI ST_STM32_USART_40013800_IRQ_0_PRIORITY