diff --git a/drivers/gpio/gpio_stm32.c b/drivers/gpio/gpio_stm32.c index 604287a855c..7f39bc72507 100644 --- a/drivers/gpio/gpio_stm32.c +++ b/drivers/gpio/gpio_stm32.c @@ -212,21 +212,20 @@ DEVICE_AND_API_INIT(gpio_stm32_## __suffix, \ #ifdef CONFIG_SOC_SERIES_STM32F1X - /* On STM32F1 series, AFIO should be clocked to access GPIOs */ -#define GPIO_DEVICE_INIT_STM32(__suffix, __SUFFIX) \ - GPIO_DEVICE_INIT("GPIO" #__SUFFIX, __suffix, \ - GPIO##__SUFFIX##_BASE, STM32_PORT##__SUFFIX, \ - LL_APB2_GRP1_PERIPH_AFIO | \ - STM32_PERIPH_GPIO##__SUFFIX, \ - STM32_CLOCK_BUS_GPIO) +#define GPIO_STM32_EXTRA_CLOCK_BITS LL_APB2_GRP1_PERIPH_AFIO #else -#define GPIO_DEVICE_INIT_STM32(__suffix, __SUFFIX) \ - GPIO_DEVICE_INIT("GPIO" #__SUFFIX, __suffix, \ - GPIO##__SUFFIX##_BASE, STM32_PORT##__SUFFIX, \ - STM32_PERIPH_GPIO##__SUFFIX, \ - STM32_CLOCK_BUS_GPIO) +#define GPIO_STM32_EXTRA_CLOCK_BITS 0u #endif /* CONFIG_SOC_SERIES_STM32F1X */ +#define GPIO_DEVICE_INIT_STM32(__suffix, __SUFFIX) \ + GPIO_DEVICE_INIT(CONFIG_GPIO_STM32_GPIO##__SUFFIX##_LABEL, \ + __suffix, \ + CONFIG_GPIO_STM32_GPIO##__SUFFIX##_BASE_ADDRESS, \ + STM32_PORT##__SUFFIX, \ + GPIO_STM32_EXTRA_CLOCK_BITS | \ + CONFIG_GPIO_STM32_GPIO##__SUFFIX##_CLOCK_BITS, \ + CONFIG_GPIO_STM32_GPIO##__SUFFIX##_CLOCK_BUS) + #ifdef CONFIG_GPIO_STM32_PORTA GPIO_DEVICE_INIT_STM32(a, A); #endif /* CONFIG_GPIO_STM32_PORTA */ diff --git a/dts/arm/st/f3/stm32f373.dtsi b/dts/arm/st/f3/stm32f373.dtsi index 115afe4a96a..f9221f3b8ec 100644 --- a/dts/arm/st/f3/stm32f373.dtsi +++ b/dts/arm/st/f3/stm32f373.dtsi @@ -8,6 +8,17 @@ / { soc { + pinctrl: pin-controller@48000000 { + gpioe: gpio@48001000 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x48001000 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00200000>; + label = "GPIOE"; + }; + }; + i2c2: i2c@40005800 { compatible = "st,stm32-i2c-v2"; clock-frequency = ; diff --git a/dts/arm/st/f4/stm32f413.dtsi b/dts/arm/st/f4/stm32f413.dtsi index 02c324cc326..d8ce4471f89 100644 --- a/dts/arm/st/f4/stm32f413.dtsi +++ b/dts/arm/st/f4/stm32f413.dtsi @@ -9,6 +9,26 @@ / { soc { + pinctrl: pin-controller@40020000 { + gpiof: gpio@40021400 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x40021400 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000020>; + label = "GPIOF"; + }; + + gpiog: gpio@40021800 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x40021800 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000040>; + label = "GPIOG"; + }; + }; + timers6: timers@40001000 { compatible = "st,stm32-timers"; reg = <0x40001000 0x400>; diff --git a/dts/arm/st/l0/stm32l073.dtsi b/dts/arm/st/l0/stm32l073.dtsi index 3c98b235789..64152033e35 100644 --- a/dts/arm/st/l0/stm32l073.dtsi +++ b/dts/arm/st/l0/stm32l073.dtsi @@ -8,6 +8,17 @@ / { soc { + pinctrl: pin-controller@50000000 { + gpioe: gpio@50001000 { + compatible = "st,stm32-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x48001000 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_IOP 0x00000010>; + label = "GPIOE"; + }; + }; + i2c2: i2c@40005800 { compatible = "st,stm32-i2c-v2"; clock-frequency = ; diff --git a/soc/arm/st_stm32/stm32f0/dts_fixup.h b/soc/arm/st_stm32/stm32f0/dts_fixup.h index c2c694e7382..5611694f774 100644 --- a/soc/arm/st_stm32/stm32f0/dts_fixup.h +++ b/soc/arm/st_stm32/stm32f0/dts_fixup.h @@ -2,6 +2,60 @@ #define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS +#define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS ST_STM32_GPIO_48000000_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 ST_STM32_GPIO_48000000_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 ST_STM32_GPIO_48000000_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER ST_STM32_GPIO_48000000_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOA_LABEL ST_STM32_GPIO_48000000_LABEL +#define CONFIG_GPIO_STM32_GPIOA_SIZE ST_STM32_GPIO_48000000_SIZE +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS ST_STM32_GPIO_48000000_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS ST_STM32_GPIO_48000000_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS ST_STM32_GPIO_48000400_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 ST_STM32_GPIO_48000400_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 ST_STM32_GPIO_48000400_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER ST_STM32_GPIO_48000400_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOB_LABEL ST_STM32_GPIO_48000400_LABEL +#define CONFIG_GPIO_STM32_GPIOB_SIZE ST_STM32_GPIO_48000400_SIZE +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS ST_STM32_GPIO_48000400_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS ST_STM32_GPIO_48000400_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS ST_STM32_GPIO_48000800_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 ST_STM32_GPIO_48000800_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 ST_STM32_GPIO_48000800_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER ST_STM32_GPIO_48000800_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOC_LABEL ST_STM32_GPIO_48000800_LABEL +#define CONFIG_GPIO_STM32_GPIOC_SIZE ST_STM32_GPIO_48000800_SIZE +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS ST_STM32_GPIO_48000800_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS ST_STM32_GPIO_48000800_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS ST_STM32_GPIO_48000C00_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 ST_STM32_GPIO_48000C00_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 ST_STM32_GPIO_48000C00_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER ST_STM32_GPIO_48000C00_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOD_LABEL ST_STM32_GPIO_48000C00_LABEL +#define CONFIG_GPIO_STM32_GPIOD_SIZE ST_STM32_GPIO_48000C00_SIZE +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS ST_STM32_GPIO_48000C00_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS ST_STM32_GPIO_48000C00_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS ST_STM32_GPIO_48001000_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 ST_STM32_GPIO_48001000_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 ST_STM32_GPIO_48001000_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER ST_STM32_GPIO_48001000_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOE_LABEL ST_STM32_GPIO_48001000_LABEL +#define CONFIG_GPIO_STM32_GPIOE_SIZE ST_STM32_GPIO_48001000_SIZE +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS ST_STM32_GPIO_48001000_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS ST_STM32_GPIO_48001000_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOF_BASE_ADDRESS ST_STM32_GPIO_48001400_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS_0 ST_STM32_GPIO_48001400_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS_0 ST_STM32_GPIO_48001400_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_CONTROLLER ST_STM32_GPIO_48001400_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOF_LABEL ST_STM32_GPIO_48001400_LABEL +#define CONFIG_GPIO_STM32_GPIOF_SIZE ST_STM32_GPIO_48001400_SIZE +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS ST_STM32_GPIO_48001400_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS ST_STM32_GPIO_48001400_CLOCK_BUS + #define CONFIG_UART_STM32_USART_1_BASE_ADDRESS ST_STM32_USART_40013800_BASE_ADDRESS #define CONFIG_UART_STM32_USART_1_BAUD_RATE ST_STM32_USART_40013800_CURRENT_SPEED #define CONFIG_UART_STM32_USART_1_IRQ_PRI ST_STM32_USART_40013800_IRQ_0_PRIORITY diff --git a/soc/arm/st_stm32/stm32f1/dts_fixup.h b/soc/arm/st_stm32/stm32f1/dts_fixup.h index f60c9edea25..b121c4a3abf 100644 --- a/soc/arm/st_stm32/stm32f1/dts_fixup.h +++ b/soc/arm/st_stm32/stm32f1/dts_fixup.h @@ -2,6 +2,60 @@ #define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS +#define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS ST_STM32_GPIO_40010800_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 ST_STM32_GPIO_40010800_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 ST_STM32_GPIO_40010800_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER ST_STM32_GPIO_40010800_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOA_LABEL ST_STM32_GPIO_40010800_LABEL +#define CONFIG_GPIO_STM32_GPIOA_SIZE ST_STM32_GPIO_40010800_SIZE +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS ST_STM32_GPIO_40010800_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS ST_STM32_GPIO_40010800_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS ST_STM32_GPIO_40010C00_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 ST_STM32_GPIO_40010C00_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 ST_STM32_GPIO_40010C00_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER ST_STM32_GPIO_40010C00_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOB_LABEL ST_STM32_GPIO_40010C00_LABEL +#define CONFIG_GPIO_STM32_GPIOB_SIZE ST_STM32_GPIO_40010C00_SIZE +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS ST_STM32_GPIO_40010C00_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS ST_STM32_GPIO_40010C00_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS ST_STM32_GPIO_40011000_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 ST_STM32_GPIO_40011000_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 ST_STM32_GPIO_40011000_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER ST_STM32_GPIO_40011000_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOC_LABEL ST_STM32_GPIO_40011000_LABEL +#define CONFIG_GPIO_STM32_GPIOC_SIZE ST_STM32_GPIO_40011000_SIZE +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS ST_STM32_GPIO_40011000_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS ST_STM32_GPIO_40011000_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS ST_STM32_GPIO_40011400_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 ST_STM32_GPIO_40011400_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 ST_STM32_GPIO_40011400_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER ST_STM32_GPIO_40011400_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOD_LABEL ST_STM32_GPIO_40011400_LABEL +#define CONFIG_GPIO_STM32_GPIOD_SIZE ST_STM32_GPIO_40011400_SIZE +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS ST_STM32_GPIO_40011400_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS ST_STM32_GPIO_40011400_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS ST_STM32_GPIO_40011800_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 ST_STM32_GPIO_40011800_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 ST_STM32_GPIO_40011800_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER ST_STM32_GPIO_40011800_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOE_LABEL ST_STM32_GPIO_40011800_LABEL +#define CONFIG_GPIO_STM32_GPIOE_SIZE ST_STM32_GPIO_40011800_SIZE +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS ST_STM32_GPIO_40011800_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS ST_STM32_GPIO_40011800_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOF_BASE_ADDRESS ST_STM32_GPIO_40011C00_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS_0 ST_STM32_GPIO_40011C00_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS_0 ST_STM32_GPIO_40011C00_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_CONTROLLER ST_STM32_GPIO_40011C00_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOF_LABEL ST_STM32_GPIO_40011C00_LABEL +#define CONFIG_GPIO_STM32_GPIOF_SIZE ST_STM32_GPIO_40011C00_SIZE +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS ST_STM32_GPIO_40011C00_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS ST_STM32_GPIO_40011C00_CLOCK_BUS + #define CONFIG_UART_STM32_USART_1_BASE_ADDRESS ST_STM32_USART_40013800_BASE_ADDRESS #define CONFIG_UART_STM32_USART_1_BAUD_RATE ST_STM32_USART_40013800_CURRENT_SPEED #define CONFIG_UART_STM32_USART_1_IRQ_PRI ST_STM32_USART_40013800_IRQ_0_PRIORITY diff --git a/soc/arm/st_stm32/stm32f2/dts_fixup.h b/soc/arm/st_stm32/stm32f2/dts_fixup.h index e7558f71483..edb4d8a19d4 100644 --- a/soc/arm/st_stm32/stm32f2/dts_fixup.h +++ b/soc/arm/st_stm32/stm32f2/dts_fixup.h @@ -2,6 +2,87 @@ #define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS +#define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS ST_STM32_GPIO_40020000_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 ST_STM32_GPIO_40020000_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 ST_STM32_GPIO_40020000_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER ST_STM32_GPIO_40020000_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOA_LABEL ST_STM32_GPIO_40020000_LABEL +#define CONFIG_GPIO_STM32_GPIOA_SIZE ST_STM32_GPIO_40020000_SIZE +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS ST_STM32_GPIO_40020000_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS ST_STM32_GPIO_40020000_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS ST_STM32_GPIO_40020400_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 ST_STM32_GPIO_40020400_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 ST_STM32_GPIO_40020400_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER ST_STM32_GPIO_40020400_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOB_LABEL ST_STM32_GPIO_40020400_LABEL +#define CONFIG_GPIO_STM32_GPIOB_SIZE ST_STM32_GPIO_40020400_SIZE +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS ST_STM32_GPIO_40020400_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS ST_STM32_GPIO_40020400_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS ST_STM32_GPIO_40020800_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 ST_STM32_GPIO_40020800_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 ST_STM32_GPIO_40020800_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER ST_STM32_GPIO_40020800_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOC_LABEL ST_STM32_GPIO_40020800_LABEL +#define CONFIG_GPIO_STM32_GPIOC_SIZE ST_STM32_GPIO_40020800_SIZE +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS ST_STM32_GPIO_40020800_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS ST_STM32_GPIO_40020800_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS ST_STM32_GPIO_40020C00_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 ST_STM32_GPIO_40020C00_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 ST_STM32_GPIO_40020C00_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER ST_STM32_GPIO_40020C00_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOD_LABEL ST_STM32_GPIO_40020C00_LABEL +#define CONFIG_GPIO_STM32_GPIOD_SIZE ST_STM32_GPIO_40020C00_SIZE +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS ST_STM32_GPIO_40020C00_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS ST_STM32_GPIO_40020C00_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS ST_STM32_GPIO_40021000_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 ST_STM32_GPIO_40021000_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 ST_STM32_GPIO_40021000_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER ST_STM32_GPIO_40021000_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOE_LABEL ST_STM32_GPIO_40021000_LABEL +#define CONFIG_GPIO_STM32_GPIOE_SIZE ST_STM32_GPIO_40021000_SIZE +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS ST_STM32_GPIO_40021000_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS ST_STM32_GPIO_40021000_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOF_BASE_ADDRESS ST_STM32_GPIO_40021400_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS_0 ST_STM32_GPIO_40021400_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS_0 ST_STM32_GPIO_40021400_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_CONTROLLER ST_STM32_GPIO_40021400_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOF_LABEL ST_STM32_GPIO_40021400_LABEL +#define CONFIG_GPIO_STM32_GPIOF_SIZE ST_STM32_GPIO_40021400_SIZE +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS ST_STM32_GPIO_40021400_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS ST_STM32_GPIO_40021400_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOG_BASE_ADDRESS ST_STM32_GPIO_40021800_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS_0 ST_STM32_GPIO_40021800_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS_0 ST_STM32_GPIO_40021800_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOG_CLOCK_CONTROLLER ST_STM32_GPIO_40021800_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOG_LABEL ST_STM32_GPIO_40021800_LABEL +#define CONFIG_GPIO_STM32_GPIOG_SIZE ST_STM32_GPIO_40021800_SIZE +#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS ST_STM32_GPIO_40021800_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS ST_STM32_GPIO_40021800_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOH_BASE_ADDRESS ST_STM32_GPIO_40021C00_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS_0 ST_STM32_GPIO_40021C00_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS_0 ST_STM32_GPIO_40021C00_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_CONTROLLER ST_STM32_GPIO_40021C00_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOH_LABEL ST_STM32_GPIO_40021C00_LABEL +#define CONFIG_GPIO_STM32_GPIOH_SIZE ST_STM32_GPIO_40021C00_SIZE +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS ST_STM32_GPIO_40021C00_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS ST_STM32_GPIO_40021C00_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOI_BASE_ADDRESS ST_STM32_GPIO_40022000_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BITS_0 ST_STM32_GPIO_40022000_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BUS_0 ST_STM32_GPIO_40022000_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOI_CLOCK_CONTROLLER ST_STM32_GPIO_40022000_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOI_LABEL ST_STM32_GPIO_40022000_LABEL +#define CONFIG_GPIO_STM32_GPIOI_SIZE ST_STM32_GPIO_40022000_SIZE +#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BITS ST_STM32_GPIO_40022000_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BUS ST_STM32_GPIO_40022000_CLOCK_BUS + #define CONFIG_UART_STM32_USART_1_BASE_ADDRESS ST_STM32_USART_40011000_BASE_ADDRESS #define CONFIG_UART_STM32_USART_1_BAUD_RATE ST_STM32_USART_40011000_CURRENT_SPEED #define CONFIG_UART_STM32_USART_1_IRQ_PRI ST_STM32_USART_40011000_IRQ_0_PRIORITY diff --git a/soc/arm/st_stm32/stm32f3/dts_fixup.h b/soc/arm/st_stm32/stm32f3/dts_fixup.h index 30fcf8224b5..0fe3468d9fe 100644 --- a/soc/arm/st_stm32/stm32f3/dts_fixup.h +++ b/soc/arm/st_stm32/stm32f3/dts_fixup.h @@ -2,6 +2,60 @@ #define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS +#define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS ST_STM32_GPIO_48000000_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 ST_STM32_GPIO_48000000_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 ST_STM32_GPIO_48000000_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER ST_STM32_GPIO_48000000_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOA_LABEL ST_STM32_GPIO_48000000_LABEL +#define CONFIG_GPIO_STM32_GPIOA_SIZE ST_STM32_GPIO_48000000_SIZE +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS ST_STM32_GPIO_48000000_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS ST_STM32_GPIO_48000000_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS ST_STM32_GPIO_48000400_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 ST_STM32_GPIO_48000400_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 ST_STM32_GPIO_48000400_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER ST_STM32_GPIO_48000400_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOB_LABEL ST_STM32_GPIO_48000400_LABEL +#define CONFIG_GPIO_STM32_GPIOB_SIZE ST_STM32_GPIO_48000400_SIZE +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS ST_STM32_GPIO_48000400_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS ST_STM32_GPIO_48000400_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS ST_STM32_GPIO_48000800_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 ST_STM32_GPIO_48000800_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 ST_STM32_GPIO_48000800_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER ST_STM32_GPIO_48000800_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOC_LABEL ST_STM32_GPIO_48000800_LABEL +#define CONFIG_GPIO_STM32_GPIOC_SIZE ST_STM32_GPIO_48000800_SIZE +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS ST_STM32_GPIO_48000800_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS ST_STM32_GPIO_48000800_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS ST_STM32_GPIO_48000C00_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 ST_STM32_GPIO_48000C00_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 ST_STM32_GPIO_48000C00_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER ST_STM32_GPIO_48000C00_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOD_LABEL ST_STM32_GPIO_48000C00_LABEL +#define CONFIG_GPIO_STM32_GPIOD_SIZE ST_STM32_GPIO_48000C00_SIZE +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS ST_STM32_GPIO_48000C00_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS ST_STM32_GPIO_48000C00_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS ST_STM32_GPIO_48001000_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 ST_STM32_GPIO_48001000_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 ST_STM32_GPIO_48001000_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER ST_STM32_GPIO_48001000_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOE_LABEL ST_STM32_GPIO_48001000_LABEL +#define CONFIG_GPIO_STM32_GPIOE_SIZE ST_STM32_GPIO_48001000_SIZE +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS ST_STM32_GPIO_48001000_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS ST_STM32_GPIO_48001000_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOF_BASE_ADDRESS ST_STM32_GPIO_48001400_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS_0 ST_STM32_GPIO_48001400_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS_0 ST_STM32_GPIO_48001400_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_CONTROLLER ST_STM32_GPIO_48001400_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOF_LABEL ST_STM32_GPIO_48001400_LABEL +#define CONFIG_GPIO_STM32_GPIOF_SIZE ST_STM32_GPIO_48001400_SIZE +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS ST_STM32_GPIO_48001400_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS ST_STM32_GPIO_48001400_CLOCK_BUS + #define CONFIG_UART_STM32_USART_1_BASE_ADDRESS ST_STM32_USART_40013800_BASE_ADDRESS #define CONFIG_UART_STM32_USART_1_BAUD_RATE ST_STM32_USART_40013800_CURRENT_SPEED #define CONFIG_UART_STM32_USART_1_IRQ_PRI ST_STM32_USART_40013800_IRQ_0_PRIORITY diff --git a/soc/arm/st_stm32/stm32f4/dts_fixup.h b/soc/arm/st_stm32/stm32f4/dts_fixup.h index c6aa63848bf..8dd1877f97e 100644 --- a/soc/arm/st_stm32/stm32f4/dts_fixup.h +++ b/soc/arm/st_stm32/stm32f4/dts_fixup.h @@ -2,6 +2,105 @@ #define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS +#define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS ST_STM32_GPIO_40020000_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 ST_STM32_GPIO_40020000_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 ST_STM32_GPIO_40020000_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER ST_STM32_GPIO_40020000_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOA_LABEL ST_STM32_GPIO_40020000_LABEL +#define CONFIG_GPIO_STM32_GPIOA_SIZE ST_STM32_GPIO_40020000_SIZE +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS ST_STM32_GPIO_40020000_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS ST_STM32_GPIO_40020000_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS ST_STM32_GPIO_40020400_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 ST_STM32_GPIO_40020400_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 ST_STM32_GPIO_40020400_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER ST_STM32_GPIO_40020400_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOB_LABEL ST_STM32_GPIO_40020400_LABEL +#define CONFIG_GPIO_STM32_GPIOB_SIZE ST_STM32_GPIO_40020400_SIZE +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS ST_STM32_GPIO_40020400_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS ST_STM32_GPIO_40020400_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS ST_STM32_GPIO_40020800_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 ST_STM32_GPIO_40020800_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 ST_STM32_GPIO_40020800_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER ST_STM32_GPIO_40020800_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOC_LABEL ST_STM32_GPIO_40020800_LABEL +#define CONFIG_GPIO_STM32_GPIOC_SIZE ST_STM32_GPIO_40020800_SIZE +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS ST_STM32_GPIO_40020800_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS ST_STM32_GPIO_40020800_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS ST_STM32_GPIO_40020C00_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 ST_STM32_GPIO_40020C00_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 ST_STM32_GPIO_40020C00_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER ST_STM32_GPIO_40020C00_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOD_LABEL ST_STM32_GPIO_40020C00_LABEL +#define CONFIG_GPIO_STM32_GPIOD_SIZE ST_STM32_GPIO_40020C00_SIZE +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS ST_STM32_GPIO_40020C00_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS ST_STM32_GPIO_40020C00_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS ST_STM32_GPIO_40021000_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 ST_STM32_GPIO_40021000_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 ST_STM32_GPIO_40021000_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER ST_STM32_GPIO_40021000_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOE_LABEL ST_STM32_GPIO_40021000_LABEL +#define CONFIG_GPIO_STM32_GPIOE_SIZE ST_STM32_GPIO_40021000_SIZE +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS ST_STM32_GPIO_40021000_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS ST_STM32_GPIO_40021000_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOF_BASE_ADDRESS ST_STM32_GPIO_40021400_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS_0 ST_STM32_GPIO_40021400_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS_0 ST_STM32_GPIO_40021400_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_CONTROLLER ST_STM32_GPIO_40021400_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOF_LABEL ST_STM32_GPIO_40021400_LABEL +#define CONFIG_GPIO_STM32_GPIOF_SIZE ST_STM32_GPIO_40021400_SIZE +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS ST_STM32_GPIO_40021400_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS ST_STM32_GPIO_40021400_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOG_BASE_ADDRESS ST_STM32_GPIO_40021800_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS_0 ST_STM32_GPIO_40021800_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS_0 ST_STM32_GPIO_40021800_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOG_CLOCK_CONTROLLER ST_STM32_GPIO_40021800_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOG_LABEL ST_STM32_GPIO_40021800_LABEL +#define CONFIG_GPIO_STM32_GPIOG_SIZE ST_STM32_GPIO_40021800_SIZE +#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS ST_STM32_GPIO_40021800_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS ST_STM32_GPIO_40021800_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOH_BASE_ADDRESS ST_STM32_GPIO_40021C00_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS_0 ST_STM32_GPIO_40021C00_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS_0 ST_STM32_GPIO_40021C00_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_CONTROLLER ST_STM32_GPIO_40021C00_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOH_LABEL ST_STM32_GPIO_40021C00_LABEL +#define CONFIG_GPIO_STM32_GPIOH_SIZE ST_STM32_GPIO_40021C00_SIZE +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS ST_STM32_GPIO_40021C00_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS ST_STM32_GPIO_40021C00_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOI_BASE_ADDRESS ST_STM32_GPIO_40022000_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BITS_0 ST_STM32_GPIO_40022000_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BUS_0 ST_STM32_GPIO_40022000_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOI_CLOCK_CONTROLLER ST_STM32_GPIO_40022000_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOI_LABEL ST_STM32_GPIO_40022000_LABEL +#define CONFIG_GPIO_STM32_GPIOI_SIZE ST_STM32_GPIO_40022000_SIZE +#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BITS ST_STM32_GPIO_40022000_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BUS ST_STM32_GPIO_40022000_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOJ_BASE_ADDRESS ST_STM32_GPIO_40022400_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOJ_CLOCK_BITS_0 ST_STM32_GPIO_40022400_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOJ_CLOCK_BUS_0 ST_STM32_GPIO_40022400_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOJ_CLOCK_CONTROLLER ST_STM32_GPIO_40022400_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOJ_LABEL ST_STM32_GPIO_40022400_LABEL +#define CONFIG_GPIO_STM32_GPIOJ_SIZE ST_STM32_GPIO_40022400_SIZE +#define CONFIG_GPIO_STM32_GPIOJ_CLOCK_BITS ST_STM32_GPIO_40022400_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOJ_CLOCK_BUS ST_STM32_GPIO_40022400_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOK_BASE_ADDRESS ST_STM32_GPIO_40022800_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOK_CLOCK_BITS_0 ST_STM32_GPIO_40022800_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOK_CLOCK_BUS_0 ST_STM32_GPIO_40022800_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOK_CLOCK_CONTROLLER ST_STM32_GPIO_40022800_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOK_LABEL ST_STM32_GPIO_40022800_LABEL +#define CONFIG_GPIO_STM32_GPIOK_SIZE ST_STM32_GPIO_40022800_SIZE +#define CONFIG_GPIO_STM32_GPIOK_CLOCK_BITS ST_STM32_GPIO_40022800_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOK_CLOCK_BUS ST_STM32_GPIO_40022800_CLOCK_BUS + #define CONFIG_UART_STM32_USART_1_BASE_ADDRESS ST_STM32_USART_40011000_BASE_ADDRESS #define CONFIG_UART_STM32_USART_1_BAUD_RATE ST_STM32_USART_40011000_CURRENT_SPEED #define CONFIG_UART_STM32_USART_1_IRQ_PRI ST_STM32_USART_40011000_IRQ_0_PRIORITY diff --git a/soc/arm/st_stm32/stm32f7/dts_fixup.h b/soc/arm/st_stm32/stm32f7/dts_fixup.h index ff1cfd304de..21c35670e7e 100644 --- a/soc/arm/st_stm32/stm32f7/dts_fixup.h +++ b/soc/arm/st_stm32/stm32f7/dts_fixup.h @@ -2,6 +2,105 @@ #define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS +#define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS ST_STM32_GPIO_40020000_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 ST_STM32_GPIO_40020000_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 ST_STM32_GPIO_40020000_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER ST_STM32_GPIO_40020000_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOA_LABEL ST_STM32_GPIO_40020000_LABEL +#define CONFIG_GPIO_STM32_GPIOA_SIZE ST_STM32_GPIO_40020000_SIZE +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS ST_STM32_GPIO_40020000_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS ST_STM32_GPIO_40020000_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS ST_STM32_GPIO_40020400_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 ST_STM32_GPIO_40020400_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 ST_STM32_GPIO_40020400_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER ST_STM32_GPIO_40020400_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOB_LABEL ST_STM32_GPIO_40020400_LABEL +#define CONFIG_GPIO_STM32_GPIOB_SIZE ST_STM32_GPIO_40020400_SIZE +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS ST_STM32_GPIO_40020400_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS ST_STM32_GPIO_40020400_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS ST_STM32_GPIO_40020800_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 ST_STM32_GPIO_40020800_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 ST_STM32_GPIO_40020800_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER ST_STM32_GPIO_40020800_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOC_LABEL ST_STM32_GPIO_40020800_LABEL +#define CONFIG_GPIO_STM32_GPIOC_SIZE ST_STM32_GPIO_40020800_SIZE +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS ST_STM32_GPIO_40020800_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS ST_STM32_GPIO_40020800_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS ST_STM32_GPIO_40020C00_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 ST_STM32_GPIO_40020C00_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 ST_STM32_GPIO_40020C00_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER ST_STM32_GPIO_40020C00_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOD_LABEL ST_STM32_GPIO_40020C00_LABEL +#define CONFIG_GPIO_STM32_GPIOD_SIZE ST_STM32_GPIO_40020C00_SIZE +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS ST_STM32_GPIO_40020C00_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS ST_STM32_GPIO_40020C00_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS ST_STM32_GPIO_40021000_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 ST_STM32_GPIO_40021000_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 ST_STM32_GPIO_40021000_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER ST_STM32_GPIO_40021000_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOE_LABEL ST_STM32_GPIO_40021000_LABEL +#define CONFIG_GPIO_STM32_GPIOE_SIZE ST_STM32_GPIO_40021000_SIZE +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS ST_STM32_GPIO_40021000_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS ST_STM32_GPIO_40021000_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOF_BASE_ADDRESS ST_STM32_GPIO_40021400_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS_0 ST_STM32_GPIO_40021400_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS_0 ST_STM32_GPIO_40021400_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_CONTROLLER ST_STM32_GPIO_40021400_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOF_LABEL ST_STM32_GPIO_40021400_LABEL +#define CONFIG_GPIO_STM32_GPIOF_SIZE ST_STM32_GPIO_40021400_SIZE +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS ST_STM32_GPIO_40021400_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS ST_STM32_GPIO_40021400_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOG_BASE_ADDRESS ST_STM32_GPIO_40021800_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS_0 ST_STM32_GPIO_40021800_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS_0 ST_STM32_GPIO_40021800_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOG_CLOCK_CONTROLLER ST_STM32_GPIO_40021800_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOG_LABEL ST_STM32_GPIO_40021800_LABEL +#define CONFIG_GPIO_STM32_GPIOG_SIZE ST_STM32_GPIO_40021800_SIZE +#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS ST_STM32_GPIO_40021800_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS ST_STM32_GPIO_40021800_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOH_BASE_ADDRESS ST_STM32_GPIO_40021C00_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS_0 ST_STM32_GPIO_40021C00_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS_0 ST_STM32_GPIO_40021C00_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_CONTROLLER ST_STM32_GPIO_40021C00_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOH_LABEL ST_STM32_GPIO_40021C00_LABEL +#define CONFIG_GPIO_STM32_GPIOH_SIZE ST_STM32_GPIO_40021C00_SIZE +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS ST_STM32_GPIO_40021C00_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS ST_STM32_GPIO_40021C00_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOI_BASE_ADDRESS ST_STM32_GPIO_40022000_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BITS_0 ST_STM32_GPIO_40022000_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BUS_0 ST_STM32_GPIO_40022000_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOI_CLOCK_CONTROLLER ST_STM32_GPIO_40022000_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOI_LABEL ST_STM32_GPIO_40022000_LABEL +#define CONFIG_GPIO_STM32_GPIOI_SIZE ST_STM32_GPIO_40022000_SIZE +#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BITS ST_STM32_GPIO_40022000_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BUS ST_STM32_GPIO_40022000_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOJ_BASE_ADDRESS ST_STM32_GPIO_40022400_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOJ_CLOCK_BITS_0 ST_STM32_GPIO_40022400_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOJ_CLOCK_BUS_0 ST_STM32_GPIO_40022400_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOJ_CLOCK_CONTROLLER ST_STM32_GPIO_40022400_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOJ_LABEL ST_STM32_GPIO_40022400_LABEL +#define CONFIG_GPIO_STM32_GPIOJ_SIZE ST_STM32_GPIO_40022400_SIZE +#define CONFIG_GPIO_STM32_GPIOJ_CLOCK_BITS ST_STM32_GPIO_40022400_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOJ_CLOCK_BUS ST_STM32_GPIO_40022400_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOK_BASE_ADDRESS ST_STM32_GPIO_40022800_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOK_CLOCK_BITS_0 ST_STM32_GPIO_40022800_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOK_CLOCK_BUS_0 ST_STM32_GPIO_40022800_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOK_CLOCK_CONTROLLER ST_STM32_GPIO_40022800_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOK_LABEL ST_STM32_GPIO_40022800_LABEL +#define CONFIG_GPIO_STM32_GPIOK_SIZE ST_STM32_GPIO_40022800_SIZE +#define CONFIG_GPIO_STM32_GPIOK_CLOCK_BITS ST_STM32_GPIO_40022800_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOK_CLOCK_BUS ST_STM32_GPIO_40022800_CLOCK_BUS + #define CONFIG_UART_STM32_USART_1_BASE_ADDRESS ST_STM32_USART_40011000_BASE_ADDRESS #define CONFIG_UART_STM32_USART_1_BAUD_RATE ST_STM32_USART_40011000_CURRENT_SPEED #define CONFIG_UART_STM32_USART_1_IRQ_PRI ST_STM32_USART_40011000_IRQ_0_PRIORITY diff --git a/soc/arm/st_stm32/stm32l0/dts_fixup.h b/soc/arm/st_stm32/stm32l0/dts_fixup.h index 30b594a2b7a..5bfa4e0042c 100644 --- a/soc/arm/st_stm32/stm32l0/dts_fixup.h +++ b/soc/arm/st_stm32/stm32l0/dts_fixup.h @@ -2,6 +2,62 @@ #define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS +#define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS ST_STM32_GPIO_50000000_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 ST_STM32_GPIO_50000000_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 ST_STM32_GPIO_50000000_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER ST_STM32_GPIO_50000000_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOA_LABEL ST_STM32_GPIO_50000000_LABEL +#define CONFIG_GPIO_STM32_GPIOA_SIZE ST_STM32_GPIO_50000000_SIZE +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS ST_STM32_GPIO_50000000_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS ST_STM32_GPIO_50000000_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS ST_STM32_GPIO_50000400_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 ST_STM32_GPIO_50000400_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 ST_STM32_GPIO_50000400_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER ST_STM32_GPIO_50000400_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOB_LABEL ST_STM32_GPIO_50000400_LABEL +#define CONFIG_GPIO_STM32_GPIOB_SIZE ST_STM32_GPIO_50000400_SIZE +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS ST_STM32_GPIO_50000400_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS ST_STM32_GPIO_50000400_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS ST_STM32_GPIO_50000800_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 ST_STM32_GPIO_50000800_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 ST_STM32_GPIO_50000800_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER ST_STM32_GPIO_50000800_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOC_LABEL ST_STM32_GPIO_50000800_LABEL +#define CONFIG_GPIO_STM32_GPIOC_SIZE ST_STM32_GPIO_50000800_SIZE +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS ST_STM32_GPIO_50000800_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS ST_STM32_GPIO_50000800_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS ST_STM32_GPIO_50000C00_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 ST_STM32_GPIO_50000C00_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 ST_STM32_GPIO_50000C00_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER ST_STM32_GPIO_50000C00_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOD_LABEL ST_STM32_GPIO_50000C00_LABEL +#define CONFIG_GPIO_STM32_GPIOD_SIZE ST_STM32_GPIO_50000C00_SIZE +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS ST_STM32_GPIO_50000C00_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS ST_STM32_GPIO_50000C00_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS ST_STM32_GPIO_50001000_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 ST_STM32_GPIO_50001000_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 ST_STM32_GPIO_50001000_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER ST_STM32_GPIO_50001000_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOE_LABEL ST_STM32_GPIO_50001000_LABEL +#define CONFIG_GPIO_STM32_GPIOE_SIZE ST_STM32_GPIO_50001000_SIZE +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS ST_STM32_GPIO_50001000_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS ST_STM32_GPIO_50001000_CLOCK_BUS + +/* there is no reference to GPIOF and GPIOG in the dts files */ + +#define CONFIG_GPIO_STM32_GPIOH_BASE_ADDRESS ST_STM32_GPIO_50001C00_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS_0 ST_STM32_GPIO_50001C00_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS_0 ST_STM32_GPIO_50001C00_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_CONTROLLER ST_STM32_GPIO_50001C00_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOH_LABEL ST_STM32_GPIO_50001C00_LABEL +#define CONFIG_GPIO_STM32_GPIOH_SIZE ST_STM32_GPIO_50001C00_SIZE +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS ST_STM32_GPIO_50001C00_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS ST_STM32_GPIO_50001C00_CLOCK_BUS + #define CONFIG_UART_STM32_USART_1_BASE_ADDRESS ST_STM32_USART_40013800_BASE_ADDRESS #define CONFIG_UART_STM32_USART_1_BAUD_RATE ST_STM32_USART_40013800_CURRENT_SPEED #define CONFIG_UART_STM32_USART_1_IRQ_PRI ST_STM32_USART_40013800_IRQ_0_PRIORITY diff --git a/soc/arm/st_stm32/stm32l4/dts_fixup.h b/soc/arm/st_stm32/stm32l4/dts_fixup.h index 81410cf2936..294ab6da77a 100644 --- a/soc/arm/st_stm32/stm32l4/dts_fixup.h +++ b/soc/arm/st_stm32/stm32l4/dts_fixup.h @@ -2,6 +2,87 @@ #define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS +#define CONFIG_GPIO_STM32_GPIOA_BASE_ADDRESS ST_STM32_GPIO_48000000_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS_0 ST_STM32_GPIO_48000000_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS_0 ST_STM32_GPIO_48000000_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_CONTROLLER ST_STM32_GPIO_48000000_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOA_LABEL ST_STM32_GPIO_48000000_LABEL +#define CONFIG_GPIO_STM32_GPIOA_SIZE ST_STM32_GPIO_48000000_SIZE +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BITS ST_STM32_GPIO_48000000_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOA_CLOCK_BUS ST_STM32_GPIO_48000000_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOB_BASE_ADDRESS ST_STM32_GPIO_48000400_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS_0 ST_STM32_GPIO_48000400_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS_0 ST_STM32_GPIO_48000400_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_CONTROLLER ST_STM32_GPIO_48000400_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOB_LABEL ST_STM32_GPIO_48000400_LABEL +#define CONFIG_GPIO_STM32_GPIOB_SIZE ST_STM32_GPIO_48000400_SIZE +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BITS ST_STM32_GPIO_48000400_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOB_CLOCK_BUS ST_STM32_GPIO_48000400_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOC_BASE_ADDRESS ST_STM32_GPIO_48000800_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS_0 ST_STM32_GPIO_48000800_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS_0 ST_STM32_GPIO_48000800_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_CONTROLLER ST_STM32_GPIO_48000800_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOC_LABEL ST_STM32_GPIO_48000800_LABEL +#define CONFIG_GPIO_STM32_GPIOC_SIZE ST_STM32_GPIO_48000800_SIZE +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BITS ST_STM32_GPIO_48000800_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOC_CLOCK_BUS ST_STM32_GPIO_48000800_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOD_BASE_ADDRESS ST_STM32_GPIO_48000C00_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS_0 ST_STM32_GPIO_48000C00_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS_0 ST_STM32_GPIO_48000C00_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_CONTROLLER ST_STM32_GPIO_48000C00_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOD_LABEL ST_STM32_GPIO_48000C00_LABEL +#define CONFIG_GPIO_STM32_GPIOD_SIZE ST_STM32_GPIO_48000C00_SIZE +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BITS ST_STM32_GPIO_48000C00_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOD_CLOCK_BUS ST_STM32_GPIO_48000C00_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOE_BASE_ADDRESS ST_STM32_GPIO_48001000_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS_0 ST_STM32_GPIO_48001000_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS_0 ST_STM32_GPIO_48001000_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_CONTROLLER ST_STM32_GPIO_48001000_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOE_LABEL ST_STM32_GPIO_48001000_LABEL +#define CONFIG_GPIO_STM32_GPIOE_SIZE ST_STM32_GPIO_48001000_SIZE +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BITS ST_STM32_GPIO_48001000_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOE_CLOCK_BUS ST_STM32_GPIO_48001000_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOF_BASE_ADDRESS ST_STM32_GPIO_48001400_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS_0 ST_STM32_GPIO_48001400_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS_0 ST_STM32_GPIO_48001400_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_CONTROLLER ST_STM32_GPIO_48001400_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOF_LABEL ST_STM32_GPIO_48001400_LABEL +#define CONFIG_GPIO_STM32_GPIOF_SIZE ST_STM32_GPIO_48001400_SIZE +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BITS ST_STM32_GPIO_48001400_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOF_CLOCK_BUS ST_STM32_GPIO_48001400_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOG_BASE_ADDRESS ST_STM32_GPIO_48001800_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS_0 ST_STM32_GPIO_48001800_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS_0 ST_STM32_GPIO_48001800_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOG_CLOCK_CONTROLLER ST_STM32_GPIO_48001800_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOG_LABEL ST_STM32_GPIO_48001800_LABEL +#define CONFIG_GPIO_STM32_GPIOG_SIZE ST_STM32_GPIO_48001800_SIZE +#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BITS ST_STM32_GPIO_48001800_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOG_CLOCK_BUS ST_STM32_GPIO_48001800_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOH_BASE_ADDRESS ST_STM32_GPIO_48001C00_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS_0 ST_STM32_GPIO_48001C00_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS_0 ST_STM32_GPIO_48001C00_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_CONTROLLER ST_STM32_GPIO_48001C00_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOH_LABEL ST_STM32_GPIO_48001C00_LABEL +#define CONFIG_GPIO_STM32_GPIOH_SIZE ST_STM32_GPIO_48001C00_SIZE +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BITS ST_STM32_GPIO_48001C00_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOH_CLOCK_BUS ST_STM32_GPIO_48001C00_CLOCK_BUS + +#define CONFIG_GPIO_STM32_GPIOI_BASE_ADDRESS ST_STM32_GPIO_48002000_BASE_ADDRESS +#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BITS_0 ST_STM32_GPIO_48002000_CLOCK_BITS_0 +#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BUS_0 ST_STM32_GPIO_48002000_CLOCK_BUS_0 +#define CONFIG_GPIO_STM32_GPIOI_CLOCK_CONTROLLER ST_STM32_GPIO_48002000_CLOCK_CONTROLLER +#define CONFIG_GPIO_STM32_GPIOI_LABEL ST_STM32_GPIO_48002000_LABEL +#define CONFIG_GPIO_STM32_GPIOI_SIZE ST_STM32_GPIO_48002000_SIZE +#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BITS ST_STM32_GPIO_48002000_CLOCK_BITS +#define CONFIG_GPIO_STM32_GPIOI_CLOCK_BUS ST_STM32_GPIO_48002000_CLOCK_BUS + #define CONFIG_UART_STM32_USART_1_BASE_ADDRESS ST_STM32_USART_40013800_BASE_ADDRESS #define CONFIG_UART_STM32_USART_1_BAUD_RATE ST_STM32_USART_40013800_CURRENT_SPEED #define CONFIG_UART_STM32_USART_1_IRQ_PRI ST_STM32_USART_40013800_IRQ_0_PRIORITY